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radeonsi: always use PFP_SYNC_ME when doing flushes and waits

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This is typically used by the closed driver before SURFACE_SYNC.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2016-04-17 17:28:25 +02:00
parent 1db5678688
commit dd9ca77cb9
2 changed files with 10 additions and 1 deletions
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10
src/gallium/drivers/radeonsi/si_state_draw.c
View file

@ -706,8 +706,16 @@ void si_emit_cache_flush(struct si_context *si_ctx, struct r600_atom *atom)
radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_STREAMOUT_SYNC) | EVENT_INDEX(0));
}
/* Make sure ME is idle (it executes most packets) before continuing.
* This prevents read-after-write hazards between PFP and ME.
*/
if (cp_coher_cntl || (sctx->flags & SI_CONTEXT_CS_PARTIAL_FLUSH)) {
radeon_emit(cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0));
radeon_emit(cs, 0);
}
/* When one of the DEST_BASE flags is set, SURFACE_SYNC waits for idle.
* Therefore, it should be last.
* Therefore, it should be last. Done in PFP.
*/
if (cp_coher_cntl) {
/* ACQUIRE_MEM is only required on a compute ring. */

1
src/gallium/drivers/radeonsi/sid.h
View file

@ -132,6 +132,7 @@
#define COPY_DATA_DST_SEL(x) (((x) & 0xf) << 8)
#define COPY_DATA_COUNT_SEL (1 << 16)
#define COPY_DATA_WR_CONFIRM (1 << 20)
#define PKT3_PFP_SYNC_ME 0x42 /* r7xx+ */
#define PKT3_SURFACE_SYNC 0x43 /* deprecated on CIK, use ACQUIRE_MEM */
#define PKT3_ME_INITIALIZE 0x44 /* not on CIK */
#define PKT3_COND_WRITE 0x45