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freedreno/ir3: set even bit for f2f16_rtne

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Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4708>
This commit is contained in:
Jonathan Marek 2020-04-22 23:21:20 -04:00 • committed by Marge Bot
parent edc35c1f54
commit dd49a40410
1 changed files with 7 additions and 2 deletions
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9
src/freedreno/ir3/ir3_compiler_nir.c
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@ -236,7 +236,6 @@ create_cov(struct ir3_context *ctx, struct ir3_instruction *src,
case nir_op_f2f16_rtne:
case nir_op_f2f16_rtz:
case nir_op_f2f16:
/* TODO how to handle rounding mode? */
case nir_op_i2f16:
case nir_op_u2f16:
dst_type = TYPE_F16;
@ -276,7 +275,13 @@ create_cov(struct ir3_context *ctx, struct ir3_instruction *src,
ir3_context_error(ctx, "invalid conversion op: %u", op);
}
return ir3_COV(ctx->block, src, src_type, dst_type);
struct ir3_instruction *cov =
ir3_COV(ctx->block, src, src_type, dst_type);
if (op == nir_op_f2f16_rtne)
cov->regs[0]->flags |= IR3_REG_EVEN;
return cov;
}
static void