intel/vec4: Delete vec4_visitor::emit_lrp

Effectivley unused since dd7135d55d ("intel/compiler: Use the flrp
lowering pass for all stages on Gen4 and Gen5").  I had intended to
remove this code as part of that series, but I forgot.

Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Ian Romanick 2019-06-06 11:00:40 -07:00
parent 5450fd7a36
commit dd2dc7e707
3 changed files with 5 additions and 32 deletions

View file

@ -236,9 +236,6 @@ public:
vec4_instruction *emit_minmax(enum brw_conditional_mod conditionalmod, dst_reg dst,
src_reg src0, src_reg src1);
vec4_instruction *emit_lrp(const dst_reg &dst, const src_reg &x,
const src_reg &y, const src_reg &a);
/**
* Copy any live channel from \p src to the first channel of the
* result.

View file

@ -1926,7 +1926,11 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
break;
case nir_op_flrp:
inst = emit_lrp(dst, op[0], op[1], op[2]);
op[0] = fix_3src_operand(op[0]);
op[1] = fix_3src_operand(op[1]);
op[2] = fix_3src_operand(op[2]);
inst = emit(LRP(dst, op[2], op[1], op[0]));
inst->saturate = instr->dest.saturate;
break;

View file

@ -736,34 +736,6 @@ vec4_visitor::emit_minmax(enum brw_conditional_mod conditionalmod, dst_reg dst,
return inst;
}
vec4_instruction *
vec4_visitor::emit_lrp(const dst_reg &dst,
const src_reg &x, const src_reg &y, const src_reg &a)
{
if (devinfo->gen >= 6 && devinfo->gen <= 10) {
/* Note that the instruction's argument order is reversed from GLSL
* and the IR.
*/
return emit(LRP(dst, fix_3src_operand(a), fix_3src_operand(y),
fix_3src_operand(x)));
} else {
/* Earlier generations don't support three source operations, so we
* need to emit x*(1-a) + y*a.
*/
dst_reg y_times_a = dst_reg(this, glsl_type::vec4_type);
dst_reg one_minus_a = dst_reg(this, glsl_type::vec4_type);
dst_reg x_times_one_minus_a = dst_reg(this, glsl_type::vec4_type);
y_times_a.writemask = dst.writemask;
one_minus_a.writemask = dst.writemask;
x_times_one_minus_a.writemask = dst.writemask;
emit(MUL(y_times_a, y, a));
emit(ADD(one_minus_a, negate(a), brw_imm_f(1.0f)));
emit(MUL(x_times_one_minus_a, x, src_reg(one_minus_a)));
return emit(ADD(dst, src_reg(x_times_one_minus_a), src_reg(y_times_a)));
}
}
/**
* Emits the instructions needed to perform a pull constant load. before_block
* and before_inst can be NULL in which case the instruction will be appended