diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index 9acf4eb1f7c..71112c93aec 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -292,56 +292,52 @@ is_output(nir_intrinsic_instr *intrin) intrin->intrinsic == nir_intrinsic_store_per_view_output; } +struct remap_patch_urb_offset_state { + const struct intel_vue_map *vue_map; + enum tess_primitive_mode tes_primitive_mode; +}; static bool -remap_patch_urb_offsets(nir_block *block, nir_builder *b, - const struct intel_vue_map *vue_map, - enum tess_primitive_mode tes_primitive_mode) +remap_patch_urb_offsets(nir_builder *b, nir_intrinsic_instr *intrin, void *data) { - nir_foreach_instr_safe(instr, block) { - if (instr->type != nir_instr_type_intrinsic) - continue; + struct remap_patch_urb_offset_state *state = data; - nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); + if (!(b->shader->info.stage == MESA_SHADER_TESS_CTRL && is_output(intrin)) && + !(b->shader->info.stage == MESA_SHADER_TESS_EVAL && is_input(intrin))) + return false; - gl_shader_stage stage = b->shader->info.stage; + if (remap_tess_levels(b, intrin, state->tes_primitive_mode)) + return false; - if ((stage == MESA_SHADER_TESS_CTRL && is_output(intrin)) || - (stage == MESA_SHADER_TESS_EVAL && is_input(intrin))) { + int vue_slot = state->vue_map->varying_to_slot[intrin->const_index[0]]; + assert(vue_slot != -1); + intrin->const_index[0] = vue_slot; - if (remap_tess_levels(b, intrin, tes_primitive_mode)) - continue; + nir_src *vertex = nir_get_io_arrayed_index_src(intrin); + if (vertex) { + if (nir_src_is_const(*vertex)) { + intrin->const_index[0] += nir_src_as_uint(*vertex) * + state->vue_map->num_per_vertex_slots; + } else { + b->cursor = nir_before_instr(&intrin->instr); - int vue_slot = vue_map->varying_to_slot[intrin->const_index[0]]; - assert(vue_slot != -1); - intrin->const_index[0] = vue_slot; + /* Multiply by the number of per-vertex slots. */ + nir_def *vertex_offset = + nir_imul(b, + vertex->ssa, + nir_imm_int(b, + state->vue_map->num_per_vertex_slots)); - nir_src *vertex = nir_get_io_arrayed_index_src(intrin); - if (vertex) { - if (nir_src_is_const(*vertex)) { - intrin->const_index[0] += nir_src_as_uint(*vertex) * - vue_map->num_per_vertex_slots; - } else { - b->cursor = nir_before_instr(&intrin->instr); + /* Add it to the existing offset */ + nir_src *offset = nir_get_io_offset_src(intrin); + nir_def *total_offset = + nir_iadd(b, vertex_offset, + offset->ssa); - /* Multiply by the number of per-vertex slots. */ - nir_def *vertex_offset = - nir_imul(b, - vertex->ssa, - nir_imm_int(b, - vue_map->num_per_vertex_slots)); - - /* Add it to the existing offset */ - nir_src *offset = nir_get_io_offset_src(intrin); - nir_def *total_offset = - nir_iadd(b, vertex_offset, - offset->ssa); - - nir_src_rewrite(offset, total_offset); - } - } + nir_src_rewrite(offset, total_offset); } } + return true; } @@ -406,13 +402,13 @@ brw_nir_lower_vs_inputs(nir_shader *nir) * loaded as one vec4 or dvec4 per element (or matrix column), depending on * whether it is a double-precision type or not. */ - nir_lower_io(nir, nir_var_shader_in, type_size_vec4, - nir_lower_io_lower_64bit_to_32_new); + NIR_PASS(_, nir, nir_lower_io, nir_var_shader_in, type_size_vec4, + nir_lower_io_lower_64bit_to_32_new); /* This pass needs actual constants */ - nir_opt_constant_folding(nir); + NIR_PASS(_, nir, nir_opt_constant_folding); - nir_io_add_const_offset_to_base(nir, nir_var_shader_in); + NIR_PASS(_, nir, nir_io_add_const_offset_to_base, nir_var_shader_in); /* Update shader_info::dual_slot_inputs */ nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); @@ -547,13 +543,13 @@ brw_nir_lower_vue_inputs(nir_shader *nir, var->data.driver_location = var->data.location; /* Inputs are stored in vec4 slots, so use type_size_vec4(). */ - nir_lower_io(nir, nir_var_shader_in, type_size_vec4, - nir_lower_io_lower_64bit_to_32); + NIR_PASS(_, nir, nir_lower_io, nir_var_shader_in, type_size_vec4, + nir_lower_io_lower_64bit_to_32); /* This pass needs actual constants */ - nir_opt_constant_folding(nir); + NIR_PASS(_, nir, nir_opt_constant_folding); - nir_io_add_const_offset_to_base(nir, nir_var_shader_in); + NIR_PASS(_, nir, nir_io_add_const_offset_to_base, nir_var_shader_in); nir_foreach_function_impl(impl, nir) { nir_foreach_block(block, impl) { @@ -595,21 +591,20 @@ brw_nir_lower_tes_inputs(nir_shader *nir, const struct intel_vue_map *vue_map) nir_foreach_shader_in_variable(var, nir) var->data.driver_location = var->data.location; - nir_lower_io(nir, nir_var_shader_in, type_size_vec4, - nir_lower_io_lower_64bit_to_32); + NIR_PASS(_, nir, nir_lower_io, nir_var_shader_in, type_size_vec4, + nir_lower_io_lower_64bit_to_32); /* This pass needs actual constants */ - nir_opt_constant_folding(nir); + NIR_PASS(_, nir, nir_opt_constant_folding); - nir_io_add_const_offset_to_base(nir, nir_var_shader_in); + NIR_PASS(_, nir, nir_io_add_const_offset_to_base, nir_var_shader_in); - nir_foreach_function_impl(impl, nir) { - nir_builder b = nir_builder_create(impl); - nir_foreach_block(block, impl) { - remap_patch_urb_offsets(block, &b, vue_map, - nir->info.tess._primitive_mode); - } - } + NIR_PASS(_, nir, nir_shader_intrinsics_pass, remap_patch_urb_offsets, + nir_metadata_control_flow, + &(struct remap_patch_urb_offset_state) { + .vue_map = vue_map, + .tes_primitive_mode = nir->info.tess._primitive_mode, + }); } static bool @@ -686,29 +681,33 @@ brw_nir_lower_fs_inputs(nir_shader *nir, } } - nir_lower_io(nir, nir_var_shader_in, type_size_vec4, - nir_lower_io_lower_64bit_to_32 | - nir_lower_io_use_interpolated_input_intrinsics); + NIR_PASS(_, nir, nir_lower_io, + nir_var_shader_in, type_size_vec4, + nir_lower_io_lower_64bit_to_32 | + nir_lower_io_use_interpolated_input_intrinsics); if (devinfo->ver >= 11) - nir_lower_interpolation(nir, ~0); + NIR_PASS(_, nir, nir_lower_interpolation, ~0); if (key->multisample_fbo == INTEL_NEVER) { - nir_lower_single_sampled(nir); + NIR_PASS(_, nir, nir_lower_single_sampled); } else if (key->persample_interp == INTEL_ALWAYS) { - nir_shader_intrinsics_pass(nir, lower_barycentric_per_sample, - nir_metadata_control_flow, - NULL); + NIR_PASS(_, nir, nir_shader_intrinsics_pass, + lower_barycentric_per_sample, + nir_metadata_control_flow, + NULL); } - if (devinfo->ver < 20) - nir_shader_intrinsics_pass(nir, lower_barycentric_at_offset, - nir_metadata_control_flow, - NULL); + if (devinfo->ver < 20) { + NIR_PASS(_, nir, nir_shader_intrinsics_pass, + lower_barycentric_at_offset, + nir_metadata_control_flow, + NULL); + } /* This pass needs actual constants */ - nir_opt_constant_folding(nir); + NIR_PASS(_, nir, nir_opt_constant_folding); - nir_io_add_const_offset_to_base(nir, nir_var_shader_in); + NIR_PASS(_, nir, nir_io_add_const_offset_to_base, nir_var_shader_in); } void @@ -718,9 +717,9 @@ brw_nir_lower_vue_outputs(nir_shader *nir) var->data.driver_location = var->data.location; } - nir_lower_io(nir, nir_var_shader_out, type_size_vec4, - nir_lower_io_lower_64bit_to_32); - brw_nir_lower_per_view_outputs(nir); + NIR_PASS(_, nir, nir_lower_io, nir_var_shader_out, type_size_vec4, + nir_lower_io_lower_64bit_to_32); + NIR_PASS(_, nir, brw_nir_lower_per_view_outputs); } void @@ -731,20 +730,20 @@ brw_nir_lower_tcs_outputs(nir_shader *nir, const struct intel_vue_map *vue_map, var->data.driver_location = var->data.location; } - nir_lower_io(nir, nir_var_shader_out, type_size_vec4, - nir_lower_io_lower_64bit_to_32); + NIR_PASS(_, nir, nir_lower_io, nir_var_shader_out, type_size_vec4, + nir_lower_io_lower_64bit_to_32); /* This pass needs actual constants */ - nir_opt_constant_folding(nir); + NIR_PASS(_, nir, nir_opt_constant_folding); - nir_io_add_const_offset_to_base(nir, nir_var_shader_out); + NIR_PASS(_, nir, nir_io_add_const_offset_to_base, nir_var_shader_out); - nir_foreach_function_impl(impl, nir) { - nir_builder b = nir_builder_create(impl); - nir_foreach_block(block, impl) { - remap_patch_urb_offsets(block, &b, vue_map, tes_primitive_mode); - } - } + NIR_PASS(_, nir, nir_shader_intrinsics_pass, remap_patch_urb_offsets, + nir_metadata_control_flow, + &(struct remap_patch_urb_offset_state) { + .vue_map = vue_map, + .tes_primitive_mode = tes_primitive_mode, + }); } void @@ -756,7 +755,7 @@ brw_nir_lower_fs_outputs(nir_shader *nir) SET_FIELD(var->data.location, BRW_NIR_FRAG_OUTPUT_LOCATION); } - nir_lower_io(nir, nir_var_shader_out, type_size_dvec4, 0); + NIR_PASS(_, nir, nir_lower_io, nir_var_shader_out, type_size_dvec4, 0); } static bool