fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-28 14:40:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

vc4: Use the same method as for FRAG_Z to handle fragcoord W.

Browse source 
I need to get the non-reciprocal version of W for interpolation, anyway.
This commit is contained in:
Eric Anholt 2014-09-19 10:06:49 -07:00
parent f2c39dd0e1
commit dcd03e7476
5 changed files with 15 additions and 13 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/gallium/drivers/vc4/vc4_program.c
View file

@ -840,7 +840,7 @@ emit_fragcoord_input(struct vc4_compile *c, int attr)
qir_FMUL(c,
qir_ITOF(c, qir_FRAG_Z(c)),
qir_uniform_f(c, 1.0 / 0xffffff));
c->inputs[attr * 4 + 3] = qir_FRAG_RCP_W(c);
c->inputs[attr * 4 + 3] = qir_RCP(c, qir_FRAG_W(c));
}
static struct qreg

2
src/gallium/drivers/vc4/vc4_qir.c
View file

@ -86,7 +86,7 @@ static const struct qir_op_info qir_op_info[] = {
[QOP_FRAG_X] = { "frag_x", 1, 0 },
[QOP_FRAG_Y] = { "frag_y", 1, 0 },
[QOP_FRAG_Z] = { "frag_z", 1, 0 },
[QOP_FRAG_RCP_W] = { "frag_rcp_w", 1, 0 },
[QOP_FRAG_W] = { "frag_w", 1, 0 },
[QOP_TEX_S] = { "tex_s", 0, 2 },
[QOP_TEX_T] = { "tex_t", 0, 2 },

4
src/gallium/drivers/vc4/vc4_qir.h
View file

@ -106,7 +106,7 @@ enum qop {
QOP_FRAG_X,
QOP_FRAG_Y,
QOP_FRAG_Z,
QOP_FRAG_RCP_W,
QOP_FRAG_W,
/** Texture x coordinate parameter write */
QOP_TEX_S,
@ -363,7 +363,7 @@ QIR_NODST_2(TEX_B)
QIR_ALU0(FRAG_X)
QIR_ALU0(FRAG_Y)
QIR_ALU0(FRAG_Z)
QIR_ALU0(FRAG_RCP_W)
QIR_ALU0(FRAG_W)
QIR_ALU0(TEX_RESULT)
QIR_ALU0(TLB_COLOR_READ)
QIR_NODST_1(TLB_Z_WRITE)

12
src/gallium/drivers/vc4/vc4_qpu_emit.c
View file

@ -401,18 +401,12 @@ vc4_generate_code(struct vc4_compile *c)
break;
case QOP_FRAG_Z:
/* QOP_FRAG_Z doesn't emit instructions, just
* allocates the register to the Z payload.
case QOP_FRAG_W:
/* QOP_FRAG_Z/W don't emit instructions, just allocate
* the register to the Z/W payload.
*/
break;
case QOP_FRAG_RCP_W:
queue(c, qpu_a_MOV(qpu_rb(QPU_W_SFU_RECIP),
qpu_ra(QPU_R_FRAG_PAYLOAD_ZW)));
queue(c, qpu_a_MOV(dst, qpu_r4()));
break;
case QOP_TLB_DISCARD_SETUP:
discard = true;
queue(c, qpu_a_MOV(src[0], src[0]));

8
src/gallium/drivers/vc4/vc4_register_allocate.c
View file

@ -75,6 +75,8 @@ vc4_register_allocate(struct vc4_compile *c)
}
if (qinst->op == QOP_FRAG_Z)
reg_in_use[3 + 32 + QPU_R_FRAG_PAYLOAD_ZW] = true;
if (qinst->op == QOP_FRAG_W)
reg_in_use[3 + QPU_R_FRAG_PAYLOAD_ZW] = true;
}
foreach(node, &c->instructions) {
@ -130,6 +132,12 @@ vc4_register_allocate(struct vc4_compile *c)
continue;
}
break;
case QOP_FRAG_W:
if (reg.mux != QPU_MUX_A ||
reg.addr != QPU_R_FRAG_PAYLOAD_ZW) {
continue;
}
break;
default:
if (reg.mux == QPU_MUX_R4)
continue;