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i965/gen4: Fix message parameter loading for 1D TXD sampling.
We were neglecting to load dvdx and dvdy. v is not optional.
Fixes glslparsertests tex-grad-0[12345].frag on Broadwater/Crestline.
(We still need an execution test using sampler1D.)
NOTE: This is a candidate for the 7.11 branch.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 3e1fd13f60)
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parent
bba1600531
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1 changed files with 4 additions and 2 deletions
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@ -614,6 +614,8 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
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* dPdx = dudx, dvdx, drdx
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* dPdy = dudy, dvdy, drdy
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*
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* 1-arg: Does not exist.
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*
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* 2-arg: dudx dvdx dudy dvdy
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* dPdx.x dPdx.y dPdy.x dPdy.y
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* m4 m5 m6 m7
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@ -625,14 +627,14 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
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for (int i = 0; i < ir->lod_info.grad.dPdx->type->vector_elements; i++) {
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emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), dPdx);
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dPdx.reg_offset++;
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mlen++;
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}
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mlen += MAX2(ir->lod_info.grad.dPdx->type->vector_elements, 2);
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for (int i = 0; i < ir->lod_info.grad.dPdy->type->vector_elements; i++) {
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emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), dPdy);
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dPdy.reg_offset++;
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mlen++;
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}
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mlen += MAX2(ir->lod_info.grad.dPdy->type->vector_elements, 2);
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} else {
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/* Oh joy. gen4 doesn't have SIMD8 non-shadow-compare bias/lod
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* instructions. We'll need to do SIMD16 here.
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