mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-05 16:08:04 +02:00
ir3: Use CAN_REORDER instead of NON_WRITEABLE
CAN_REORDER takes volatile into account, and is closer to what we actually require to use texture instructions, which is that we can arbitrarily reorder loads. Fixes:aa93896("freedreno/ir3: adjust condition for when to use ldib") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15114> (cherry picked from commite1c4c2ac60)
This commit is contained in:
parent
a5dfdd54c0
commit
db716caf8c
2 changed files with 2 additions and 2 deletions
|
|
@ -931,7 +931,7 @@
|
|||
"description": "ir3: Use CAN_REORDER instead of NON_WRITEABLE",
|
||||
"nominated": true,
|
||||
"nomination_type": 1,
|
||||
"resolution": 0,
|
||||
"resolution": 1,
|
||||
"main_sha": null,
|
||||
"because_sha": "aa93896156c7f076e5de1831292297084655cda3"
|
||||
},
|
||||
|
|
|
|||
|
|
@ -1396,7 +1396,7 @@ emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
|
|||
/* If the image can be written, must use LDIB to retrieve data, rather than
|
||||
* through ISAM (which uses the texture cache and won't get previous writes).
|
||||
*/
|
||||
if (!(nir_intrinsic_access(intr) & ACCESS_NON_WRITEABLE) && ctx->compiler->gen >= 5) {
|
||||
if (!(nir_intrinsic_access(intr) & ACCESS_CAN_REORDER) && ctx->compiler->gen >= 5) {
|
||||
ctx->funcs->emit_intrinsic_load_image(ctx, intr, dst);
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue