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intel/compiler: infer the number of operands using lsc_op_num_data_values

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nir_emit_global_atomic should utilize lsc_op_num_data_values to
infer the number of operands for global atomic ops, following the same
pattern as nir_emit_surface_atomic

Fixes: 90a2137 ('intel/compiler: Use LSC opcode enum rather than legacy BRW_AOPs')
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26432>
This commit is contained in:
Rohan Garg 2023-11-30 20:30:39 +01:00 • committed by Marge Bot
parent 46d98a71ef
commit db6aaa691d
1 changed files with 3 additions and 2 deletions
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5
src/intel/compiler/brw_fs_nir.cpp
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@ -6391,16 +6391,17 @@ fs_visitor::nir_emit_global_atomic(const fs_builder &bld,
nir_intrinsic_instr *instr)
{
enum lsc_opcode op = lsc_aop_for_nir_intrinsic(instr);
int num_data = lsc_op_num_data_values(op);
fs_reg dest = get_nir_def(instr->def);
fs_reg addr = get_nir_src(instr->src[0]);
fs_reg data;
if (op != LSC_OP_ATOMIC_INC && op != LSC_OP_ATOMIC_DEC)
if (num_data >= 1)
data = expand_to_32bit(bld, get_nir_src(instr->src[1]));
if (op == LSC_OP_ATOMIC_CMPXCHG) {
if (num_data >= 2) {
fs_reg tmp = bld.vgrf(data.type, 2);
fs_reg sources[2] = {
data,