fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-02-10 18:20:27 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 9

brw: Print "GRF registers" in INTEL_DEBUG=shaders output

Browse source 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39601>
This commit is contained in:
Caio Oliveira 2026-01-28 14:42:37 -08:00 • committed by Marge Bot
parent 0d19fc8256
commit db4bc5407f
1 changed files with 2 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/intel/compiler/brw/brw_generator.cpp
View file

@ -1393,6 +1393,7 @@ brw_generator::generate_code(const brw_shader &s,
"%d:%d spills:fills, %u sends, "
"scheduled with mode %s. "
"Promoted %u constants. "
"GRF registers: %u. "
"Non-SSA regs (after NIR): %u. "
"Compacted %d to %d bytes (%.0f%%)\n",
shader_name, params->source_hash, sha1buf,
@ -1404,6 +1405,7 @@ brw_generator::generate_code(const brw_shader &s,
send_count,
shader_stats.scheduler_mode,
shader_stats.promoted_constants,
s.grf_used,
shader_stats.non_ssa_registers_after_nir,
before_size, after_size,
100.0f * (before_size - after_size) / before_size);