diff --git a/src/panfrost/bifrost/bi_ra.c b/src/panfrost/bifrost/bi_ra.c
index 2e3bf0fe332..e43f5ec2406 100644
--- a/src/panfrost/bifrost/bi_ra.c
+++ b/src/panfrost/bifrost/bi_ra.c
@@ -407,6 +407,17 @@ bi_allocate_registers(bi_context *ctx, bool *success, bool full_regs)
                         assert(node < node_count);
                         l->solutions[node] = 60;
                 }
+
+                /* Experimentally, it seems coverage masks inputs to ATEST must
+                 * be in R60. Otherwise coverage mask writes do not work with
+                 * early-ZS with pixel-frequency-shading (this combination of
+                 * settings is legal if depth/stencil writes are disabled).
+                 */
+                if (ins->op == BI_OPCODE_ATEST) {
+                        unsigned node = bi_get_node(ins->src[0]);
+                        assert(node < node_count);
+                        l->solutions[node] = 60;
+                }
         }
 
         bi_compute_interference(ctx, l, full_regs);