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iris: implement Wa_14015264727 for DG2

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On DG2 we need to flush data cache before fast clear operation.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17218>
This commit is contained in:
Tapani Pälli 2022-07-20 12:30:32 +03:00 • committed by Marge Bot
parent 9c5d8dcf6c
commit da7a7c9bbc
1 changed files with 7 additions and 0 deletions
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7
src/gallium/drivers/iris/iris_clear.c
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@ -254,6 +254,11 @@ fast_clear_color(struct iris_context *ice,
* and again afterwards to ensure that the resolve is complete before we
* do any more regular drawing.
*/
/* Wa_14015264727, on DG2 we need to flush data cache before fast clear. */
bool data_cache_flush_needed =
intel_device_info_is_dg2(&batch->screen->devinfo);
iris_emit_end_of_pipe_sync(batch,
"fast clear: pre-flush",
PIPE_CONTROL_RENDER_TARGET_FLUSH |
@ -262,6 +267,8 @@ fast_clear_color(struct iris_context *ice,
PIPE_CONTROL_DEPTH_STALL : 0) |
(devinfo->verx10 == 125 ?
PIPE_CONTROL_FLUSH_HDC : 0) |
(data_cache_flush_needed ?
PIPE_CONTROL_DATA_CACHE_FLUSH : 0) |
PIPE_CONTROL_PSS_STALL_SYNC);
iris_batch_sync_region_start(batch);