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i965: Port gen4+ state emitting code to genxml.

Browse source 
On this patch, we port:
   - brw_polygon_stipple
   - brw_polygon_stipple_offset
   - brw_line_stipple
   - brw_drawing_rect

v2:
   - Also emit states for gen4-5 with this code.
v3:
   - Style fixes and remove excessive checks (Ken).

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Rafael Antognolli 2017-04-19 13:13:25 -07:00 • committed by Kenneth Graunke
parent c85b217ab0
commit da665d22f5
5 changed files with 174 additions and 230 deletions
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1
src/mesa/drivers/dri/i965/Makefile.sources
View file

@ -85,7 +85,6 @@ i965_FILES = \
gen6_sampler_state.c \
gen6_sol.c \
gen6_urb.c \
gen6_viewport_state.c \
gen7_cs_state.c \
gen7_l3_state.c \
gen7_misc_state.c \

147
src/mesa/drivers/dri/i965/brw_misc_state.c
View file

@ -44,32 +44,6 @@
#include "main/fbobject.h"
#include "main/glformats.h"
/* Constant single cliprect for framebuffer object or DRI2 drawing */
static void
upload_drawing_rect(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
const struct gl_framebuffer *fb = ctx->DrawBuffer;
const unsigned int fb_width = _mesa_geometric_width(fb);
const unsigned int fb_height = _mesa_geometric_height(fb);
BEGIN_BATCH(4);
OUT_BATCH(_3DSTATE_DRAWING_RECTANGLE << 16 | (4 - 2));
OUT_BATCH(0); /* xmin, ymin */
OUT_BATCH(((fb_width - 1) & 0xffff) | ((fb_height - 1) << 16));
OUT_BATCH(0);
ADVANCE_BATCH();
}
const struct brw_tracked_state brw_drawing_rect = {
.dirty = {
.mesa = _NEW_BUFFERS,
.brw = BRW_NEW_BLORP |
BRW_NEW_CONTEXT,
},
.emit = upload_drawing_rect
};
/**
* Upload pointers to the per-stage state.
*
@ -696,127 +670,6 @@ const struct brw_tracked_state brw_depthbuffer = {
.emit = brw_emit_depthbuffer,
};
/**
* Polygon stipple packet
*/
static void
upload_polygon_stipple(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
GLuint i;
/* _NEW_POLYGON */
if (!ctx->Polygon.StippleFlag)
return;
BEGIN_BATCH(33);
OUT_BATCH(_3DSTATE_POLY_STIPPLE_PATTERN << 16 | (33 - 2));
/* Polygon stipple is provided in OpenGL order, i.e. bottom
* row first. If we're rendering to a window (i.e. the
* default frame buffer object, 0), then we need to invert
* it to match our pixel layout. But if we're rendering
* to a FBO (i.e. any named frame buffer object), we *don't*
* need to invert - we already match the layout.
*/
if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
for (i = 0; i < 32; i++)
OUT_BATCH(ctx->PolygonStipple[31 - i]); /* invert */
} else {
for (i = 0; i < 32; i++)
OUT_BATCH(ctx->PolygonStipple[i]);
}
ADVANCE_BATCH();
}
const struct brw_tracked_state brw_polygon_stipple = {
.dirty = {
.mesa = _NEW_POLYGON |
_NEW_POLYGONSTIPPLE,
.brw = BRW_NEW_CONTEXT,
},
.emit = upload_polygon_stipple
};
/**
* Polygon stipple offset packet
*/
static void
upload_polygon_stipple_offset(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
/* _NEW_POLYGON */
if (!ctx->Polygon.StippleFlag)
return;
BEGIN_BATCH(2);
OUT_BATCH(_3DSTATE_POLY_STIPPLE_OFFSET << 16 | (2-2));
/* _NEW_BUFFERS
*
* If we're drawing to a system window we have to invert the Y axis
* in order to match the OpenGL pixel coordinate system, and our
* offset must be matched to the window position. If we're drawing
* to a user-created FBO then our native pixel coordinate system
* works just fine, and there's no window system to worry about.
*/
if (_mesa_is_winsys_fbo(ctx->DrawBuffer))
OUT_BATCH((32 - (_mesa_geometric_height(ctx->DrawBuffer) & 31)) & 31);
else
OUT_BATCH(0);
ADVANCE_BATCH();
}
const struct brw_tracked_state brw_polygon_stipple_offset = {
.dirty = {
.mesa = _NEW_BUFFERS |
_NEW_POLYGON,
.brw = BRW_NEW_CONTEXT,
},
.emit = upload_polygon_stipple_offset
};
/**
* Line stipple packet
*/
static void
upload_line_stipple(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
GLfloat tmp;
GLint tmpi;
if (!ctx->Line.StippleFlag)
return;
BEGIN_BATCH(3);
OUT_BATCH(_3DSTATE_LINE_STIPPLE_PATTERN << 16 | (3 - 2));
OUT_BATCH(ctx->Line.StipplePattern);
if (brw->gen >= 7) {
/* in U1.16 */
tmp = 1.0f / ctx->Line.StippleFactor;
tmpi = tmp * (1<<16);
OUT_BATCH(tmpi << 15 | ctx->Line.StippleFactor);
} else {
/* in U1.13 */
tmp = 1.0f / ctx->Line.StippleFactor;
tmpi = tmp * (1<<13);
OUT_BATCH(tmpi << 16 | ctx->Line.StippleFactor);
}
ADVANCE_BATCH();
}
const struct brw_tracked_state brw_line_stipple = {
.dirty = {
.mesa = _NEW_LINE,
.brw = BRW_NEW_CONTEXT,
},
.emit = upload_line_stipple
};
void
brw_emit_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline)
{

5
src/mesa/drivers/dri/i965/brw_state.h
View file

@ -56,11 +56,8 @@ extern const struct brw_tracked_state brw_curbe_offsets;
extern const struct brw_tracked_state brw_invariant_state;
extern const struct brw_tracked_state brw_fs_samplers;
extern const struct brw_tracked_state brw_gs_unit;
extern const struct brw_tracked_state brw_line_stipple;
extern const struct brw_tracked_state brw_binding_table_pointers;
extern const struct brw_tracked_state brw_depthbuffer;
extern const struct brw_tracked_state brw_polygon_stipple_offset;
extern const struct brw_tracked_state brw_polygon_stipple;
extern const struct brw_tracked_state brw_recalculate_urb_fence;
extern const struct brw_tracked_state brw_sf_unit;
extern const struct brw_tracked_state brw_sf_vp;
@ -101,7 +98,6 @@ extern const struct brw_tracked_state brw_wm_unit;
extern const struct brw_tracked_state brw_psp_urb_cbs;
extern const struct brw_tracked_state brw_drawing_rect;
extern const struct brw_tracked_state brw_indices;
extern const struct brw_tracked_state brw_index_buffer;
extern const struct brw_tracked_state brw_cs_state;
@ -113,7 +109,6 @@ extern const struct brw_tracked_state gen6_sampler_state;
extern const struct brw_tracked_state gen6_sol_surface;
extern const struct brw_tracked_state gen6_sf_vp;
extern const struct brw_tracked_state gen6_urb;
extern const struct brw_tracked_state gen6_viewport_state;
extern const struct brw_tracked_state gen7_depthbuffer;
extern const struct brw_tracked_state gen7_l3_state;
extern const struct brw_tracked_state gen7_push_constant_space;

60
src/mesa/drivers/dri/i965/gen6_viewport_state.c
View file

@ -1,60 +0,0 @@
/*
* Copyright © 2009 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
* Authors:
* Eric Anholt <eric@anholt.net>
*
*/
#include "brw_context.h"
#include "brw_state.h"
#include "brw_defines.h"
#include "intel_batchbuffer.h"
#include "main/fbobject.h"
#include "main/framebuffer.h"
#include "main/viewport.h"
static void upload_viewport_state_pointers(struct brw_context *brw)
{
BEGIN_BATCH(4);
OUT_BATCH(_3DSTATE_VIEWPORT_STATE_POINTERS << 16 | (4 - 2) |
GEN6_CC_VIEWPORT_MODIFY |
GEN6_SF_VIEWPORT_MODIFY |
GEN6_CLIP_VIEWPORT_MODIFY);
OUT_BATCH(brw->clip.vp_offset);
OUT_BATCH(brw->sf.vp_offset);
OUT_BATCH(brw->cc.vp_offset);
ADVANCE_BATCH();
}
const struct brw_tracked_state gen6_viewport_state = {
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
BRW_NEW_BLORP |
BRW_NEW_CC_VP |
BRW_NEW_CLIP_VP |
BRW_NEW_SF_VP |
BRW_NEW_STATE_BASE_ADDRESS,
},
.emit = upload_viewport_state_pointers,
};

191
src/mesa/drivers/dri/i965/genX_state_upload.c
View file

@ -175,6 +175,133 @@ vertex_bo(struct brw_bo *bo, uint32_t offset)
_brw_cmd_pack(cmd)(brw, (void *)_dst, &name), \
_dst = NULL)
/**
* Polygon stipple packet
*/
static void
genX(upload_polygon_stipple)(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
/* _NEW_POLYGON */
if (!ctx->Polygon.StippleFlag)
return;
brw_batch_emit(brw, GENX(3DSTATE_POLY_STIPPLE_PATTERN), poly) {
/* Polygon stipple is provided in OpenGL order, i.e. bottom
* row first. If we're rendering to a window (i.e. the
* default frame buffer object, 0), then we need to invert
* it to match our pixel layout. But if we're rendering
* to a FBO (i.e. any named frame buffer object), we *don't*
* need to invert - we already match the layout.
*/
if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
for (unsigned i = 0; i < 32; i++)
poly.PatternRow[i] = ctx->PolygonStipple[31 - i]; /* invert */
} else {
for (unsigned i = 0; i < 32; i++)
poly.PatternRow[i] = ctx->PolygonStipple[i];
}
}
}
static const struct brw_tracked_state genX(polygon_stipple) = {
.dirty = {
.mesa = _NEW_POLYGON |
_NEW_POLYGONSTIPPLE,
.brw = BRW_NEW_CONTEXT,
},
.emit = genX(upload_polygon_stipple),
};
/**
* Polygon stipple offset packet
*/
static void
genX(upload_polygon_stipple_offset)(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
/* _NEW_POLYGON */
if (!ctx->Polygon.StippleFlag)
return;
brw_batch_emit(brw, GENX(3DSTATE_POLY_STIPPLE_OFFSET), poly) {
/* _NEW_BUFFERS
*
* If we're drawing to a system window we have to invert the Y axis
* in order to match the OpenGL pixel coordinate system, and our
* offset must be matched to the window position. If we're drawing
* to a user-created FBO then our native pixel coordinate system
* works just fine, and there's no window system to worry about.
*/
if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
poly.PolygonStippleYOffset =
(32 - (_mesa_geometric_height(ctx->DrawBuffer) & 31)) & 31;
}
}
}
static const struct brw_tracked_state genX(polygon_stipple_offset) = {
.dirty = {
.mesa = _NEW_BUFFERS |
_NEW_POLYGON,
.brw = BRW_NEW_CONTEXT,
},
.emit = genX(upload_polygon_stipple_offset),
};
/**
* Line stipple packet
*/
static void
genX(upload_line_stipple)(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
if (!ctx->Line.StippleFlag)
return;
brw_batch_emit(brw, GENX(3DSTATE_LINE_STIPPLE), line) {
line.LineStipplePattern = ctx->Line.StipplePattern;
line.LineStippleInverseRepeatCount = 1.0f / ctx->Line.StippleFactor;
line.LineStippleRepeatCount = ctx->Line.StippleFactor;
}
}
static const struct brw_tracked_state genX(line_stipple) = {
.dirty = {
.mesa = _NEW_LINE,
.brw = BRW_NEW_CONTEXT,
},
.emit = genX(upload_line_stipple),
};
/* Constant single cliprect for framebuffer object or DRI2 drawing */
static void
genX(upload_drawing_rect)(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
const struct gl_framebuffer *fb = ctx->DrawBuffer;
const unsigned int fb_width = _mesa_geometric_width(fb);
const unsigned int fb_height = _mesa_geometric_height(fb);
brw_batch_emit(brw, GENX(3DSTATE_DRAWING_RECTANGLE), rect) {
rect.ClippedDrawingRectangleXMax = fb_width - 1;
rect.ClippedDrawingRectangleYMax = fb_height - 1;
}
}
static const struct brw_tracked_state genX(drawing_rect) = {
.dirty = {
.mesa = _NEW_BUFFERS,
.brw = BRW_NEW_BLORP |
BRW_NEW_CONTEXT,
},
.emit = genX(upload_drawing_rect),
};
static uint32_t *
genX(emit_vertex_buffer_state)(struct brw_context *brw,
uint32_t *dw,
@ -3634,6 +3761,36 @@ static const struct brw_tracked_state genX(ps_blend) = {
/* ---------------------------------------------------------------------- */
#if GEN_GEN == 6
static void
genX(upload_viewport_state_pointers)(struct brw_context *brw)
{
brw_batch_emit(brw, GENX(3DSTATE_VIEWPORT_STATE_POINTERS), vp) {
vp.CCViewportStateChange = 1;
vp.SFViewportStateChange = 1;
vp.CLIPViewportStateChange = 1;
vp.PointertoCLIP_VIEWPORT = brw->clip.vp_offset;
vp.PointertoSF_VIEWPORT = brw->sf.vp_offset;
vp.PointertoCC_VIEWPORT = brw->cc.vp_offset;
}
}
static const struct brw_tracked_state genX(viewport_state) = {
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
BRW_NEW_BLORP |
BRW_NEW_CC_VP |
BRW_NEW_CLIP_VP |
BRW_NEW_SF_VP |
BRW_NEW_STATE_BASE_ADDRESS,
},
.emit = genX(upload_viewport_state_pointers),
};
#endif
/* ---------------------------------------------------------------------- */
void
genX(init_atoms)(struct brw_context *brw)
{
@ -3681,14 +3838,14 @@ genX(init_atoms)(struct brw_context *brw)
&brw_depthbuffer,
&brw_polygon_stipple,
&brw_polygon_stipple_offset,
&genX(polygon_stipple),
&genX(polygon_stipple_offset),
&brw_line_stipple,
&genX(line_stipple),
&brw_psp_urb_cbs,
&brw_drawing_rect,
&genX(drawing_rect),
&brw_indices, /* must come before brw_vertices */
&brw_index_buffer,
&genX(vertices),
@ -3703,7 +3860,7 @@ genX(init_atoms)(struct brw_context *brw)
/* Command packets: */
&brw_cc_vp,
&gen6_viewport_state, /* must do after *_vp stages */
&genX(viewport_state), /* must do after *_vp stages */
&gen6_urb,
&genX(blend_state), /* must do before cc unit */
@ -3749,12 +3906,12 @@ genX(init_atoms)(struct brw_context *brw)
&brw_depthbuffer,
&brw_polygon_stipple,
&brw_polygon_stipple_offset,
&genX(polygon_stipple),
&genX(polygon_stipple_offset),
&brw_line_stipple,
&genX(line_stipple),
&brw_drawing_rect,
&genX(drawing_rect),
&brw_indices, /* must come before brw_vertices */
&brw_index_buffer,
@ -3837,12 +3994,12 @@ genX(init_atoms)(struct brw_context *brw)
&gen7_depthbuffer,
&brw_polygon_stipple,
&brw_polygon_stipple_offset,
&genX(polygon_stipple),
&genX(polygon_stipple_offset),
&brw_line_stipple,
&genX(line_stipple),
&brw_drawing_rect,
&genX(drawing_rect),
&brw_indices, /* must come before brw_vertices */
&brw_index_buffer,
@ -3928,12 +4085,12 @@ genX(init_atoms)(struct brw_context *brw)
&gen7_depthbuffer,
&brw_polygon_stipple,
&brw_polygon_stipple_offset,
&genX(polygon_stipple),
&genX(polygon_stipple_offset),
&brw_line_stipple,
&genX(line_stipple),
&brw_drawing_rect,
&genX(drawing_rect),
&gen8_vf_topology,