diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index dfe08f97df6..973399b8dbd 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -11504,6 +11504,9 @@ create_fs_exports(isel_context* ctx)
          out.slot = compacted_mrt_index;
          out.write_mask = ctx->outputs.mask[i];
          out.col_format = (ctx->options->key.ps.col_format >> (4 * idx)) & 0xf;
+         out.is_int8 = (ctx->options->key.ps.is_int8 >> idx) & 1;
+         out.is_int10 = (ctx->options->key.ps.is_int10 >> idx) & 1;
+         out.enable_mrt_output_nan_fixup = (ctx->options->key.ps.enable_mrt_output_nan_fixup >> idx) & 1;
 
          for (unsigned c = 0; c < 4; ++c) {
             if (out.write_mask & (1 << c)) {
diff --git a/src/amd/compiler/aco_shader_info.h b/src/amd/compiler/aco_shader_info.h
index 826aee6918c..a164664a844 100644
--- a/src/amd/compiler/aco_shader_info.h
+++ b/src/amd/compiler/aco_shader_info.h
@@ -157,6 +157,9 @@ struct aco_stage_input {
 
    struct {
       uint32_t col_format;
+      uint32_t is_int8;
+      uint32_t is_int10;
+      uint8_t enable_mrt_output_nan_fixup;
 
       /* Used to export alpha through MRTZ for alpha-to-coverage (GFX11+). */
       bool alpha_to_coverage_via_mrtz;
diff --git a/src/amd/vulkan/radv_aco_shader_info.h b/src/amd/vulkan/radv_aco_shader_info.h
index 2381feadc81..cb2f72f8ffa 100644
--- a/src/amd/vulkan/radv_aco_shader_info.h
+++ b/src/amd/vulkan/radv_aco_shader_info.h
@@ -135,6 +135,9 @@ radv_aco_convert_pipe_key(struct aco_stage_input *aco_info,
    ASSIGN_FIELD_CP(vs.vertex_binding_align);
    ASSIGN_FIELD(tcs.tess_input_vertices);
    ASSIGN_FIELD(ps.col_format);
+   ASSIGN_FIELD(ps.is_int8);
+   ASSIGN_FIELD(ps.is_int10);
+   ASSIGN_FIELD(ps.enable_mrt_output_nan_fixup);
    ASSIGN_FIELD(ps.alpha_to_coverage_via_mrtz);
    ASSIGN_FIELD(ps.mrt0_is_dual_src);
 }