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st/nine: Reorganize ff vtx processing
The new order simplified the code a bit for next patches. Signed-off-by: Axel Davy <axel.davy@ens.fr>
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cde74cba71
commit
d9d8cb9f19
1 changed files with 72 additions and 52 deletions
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@ -429,19 +429,32 @@ nine_ff_build_vs(struct NineDevice9 *device, struct vs_build_ctx *vs)
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/* === Vertex transformation / vertex blending:
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*/
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if (key->vertextween) {
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struct ureg_dst aVtx_dst = ureg_DECL_temporary(ureg);
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assert(!key->vertexblend);
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ureg_LRP(ureg, aVtx_dst, _XXXX(_CONST(30)), vs->aVtx, vs->aVtx1);
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vs->aVtx = ureg_src(aVtx_dst);
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if (need_aNrm) {
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struct ureg_dst aNrm_dst = ureg_DECL_temporary(ureg);
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ureg_LRP(ureg, aNrm_dst, _XXXX(_CONST(30)), vs->aNrm, vs->aNrm1);
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vs->aNrm = ureg_src(aNrm_dst);
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}
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}
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if (key->vertexblend) {
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if (key->position_t) {
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if (device->driver_caps.window_space_position_support) {
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ureg_MOV(ureg, oPos, vs->aVtx);
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} else {
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struct ureg_dst tmp = ureg_DECL_temporary(ureg);
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/* vs->aVtx contains the coordinates buffer wise.
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* later in the pipeline, clipping, viewport and division
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* by w (rhw = 1/w) are going to be applied, so do the reverse
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* of these transformations (except clipping) to have the good
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* position at the end.*/
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ureg_MOV(ureg, tmp, vs->aVtx);
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/* X from [X_min, X_min + width] to [-1, 1], same for Y. Z to [0, 1] */
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ureg_SUB(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _CONST(101));
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ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _CONST(100));
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ureg_SUB(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XY), ureg_src(tmp), ureg_imm1f(ureg, 1.0f));
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/* Y needs to be reversed */
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ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_negate(ureg_src(tmp)));
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/* inverse rhw */
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ureg_RCP(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_W), _W(tmp));
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/* multiply X, Y, Z by w */
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ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _W(tmp));
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ureg_MOV(ureg, oPos, ureg_src(tmp));
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ureg_release_temporary(ureg, tmp);
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}
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} else if (key->vertexblend) {
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struct ureg_dst tmp = ureg_DECL_temporary(ureg);
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struct ureg_dst aVtx_dst = ureg_DECL_temporary(ureg);
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struct ureg_dst sum_blendweights = ureg_DECL_temporary(ureg);
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@ -495,55 +508,62 @@ nine_ff_build_vs(struct NineDevice9 *device, struct vs_build_ctx *vs)
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ureg_release_temporary(ureg, sum_blendweights);
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if (!need_aVtx)
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ureg_release_temporary(ureg, aVtx_dst);
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} else
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if (key->position_t && device->driver_caps.window_space_position_support) {
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ureg_MOV(ureg, oPos, vs->aVtx);
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} else if (key->position_t) {
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struct ureg_dst tmp = ureg_DECL_temporary(ureg);
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/* vs->aVtx contains the coordinates buffer wise.
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* later in the pipeline, clipping, viewport and division
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* by w (rhw = 1/w) are going to be applied, so do the reverse
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* of these transformations (except clipping) to have the good
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* position at the end.*/
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ureg_MOV(ureg, tmp, vs->aVtx);
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/* X from [X_min, X_min + width] to [-1, 1], same for Y. Z to [0, 1] */
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ureg_SUB(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _CONST(101));
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ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _CONST(100));
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ureg_SUB(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XY), ureg_src(tmp), ureg_imm1f(ureg, 1.0f));
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/* Y needs to be reversed */
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ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_negate(ureg_src(tmp)));
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/* inverse rhw */
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ureg_RCP(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_W), _W(tmp));
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/* multiply X, Y, Z by w */
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ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _W(tmp));
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ureg_MOV(ureg, oPos, ureg_src(tmp));
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ureg_release_temporary(ureg, tmp);
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if (need_aVtx) {
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struct ureg_dst aVtx_dst2 = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ);
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ureg_MUL(ureg, aVtx_dst2, _XXXX(vs->aVtx), _CONST(4));
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ureg_MAD(ureg, aVtx_dst2, _YYYY(vs->aVtx), _CONST(5), ureg_src(aVtx_dst2));
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ureg_MAD(ureg, aVtx_dst2, _ZZZZ(vs->aVtx), _CONST(6), ureg_src(aVtx_dst2));
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ureg_MAD(ureg, aVtx_dst2, _WWWW(vs->aVtx), _CONST(7), ureg_src(aVtx_dst2));
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vs->aVtx = ureg_src(aVtx_dst2);
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}
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if (need_aNrm) {
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struct ureg_dst aNrm_dst = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ);
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ureg_MUL(ureg, aNrm_dst, _XXXX(vs->aNrm), _CONST(16));
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ureg_MAD(ureg, aNrm_dst, _YYYY(vs->aNrm), _CONST(17), ureg_src(aNrm_dst));
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ureg_MAD(ureg, aNrm_dst, _ZZZZ(vs->aNrm), _CONST(18), ureg_src(aNrm_dst));
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if (key->normalizenormals)
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ureg_normalize3(ureg, aNrm_dst, ureg_src(aNrm_dst));
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vs->aNrm = ureg_src(aNrm_dst);
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}
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} else {
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struct ureg_dst tmp = ureg_DECL_temporary(ureg);
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if (key->vertextween) {
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struct ureg_dst aVtx_dst = ureg_DECL_temporary(ureg);
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ureg_LRP(ureg, aVtx_dst, _XXXX(_CONST(30)), vs->aVtx, vs->aVtx1);
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vs->aVtx = ureg_src(aVtx_dst);
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if (need_aNrm) {
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struct ureg_dst aNrm_dst = ureg_DECL_temporary(ureg);
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ureg_LRP(ureg, aNrm_dst, _XXXX(_CONST(30)), vs->aNrm, vs->aNrm1);
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vs->aNrm = ureg_src(aNrm_dst);
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}
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}
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/* position = vertex * WORLD_VIEW_PROJ */
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ureg_MUL(ureg, tmp, _XXXX(vs->aVtx), _CONST(0));
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ureg_MAD(ureg, tmp, _YYYY(vs->aVtx), _CONST(1), ureg_src(tmp));
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ureg_MAD(ureg, tmp, _ZZZZ(vs->aVtx), _CONST(2), ureg_src(tmp));
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ureg_MAD(ureg, oPos, _WWWW(vs->aVtx), _CONST(3), ureg_src(tmp));
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ureg_release_temporary(ureg, tmp);
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}
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if (need_aVtx) {
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struct ureg_dst aVtx_dst = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ);
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ureg_MUL(ureg, aVtx_dst, _XXXX(vs->aVtx), _CONST(4));
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ureg_MAD(ureg, aVtx_dst, _YYYY(vs->aVtx), _CONST(5), ureg_src(aVtx_dst));
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ureg_MAD(ureg, aVtx_dst, _ZZZZ(vs->aVtx), _CONST(6), ureg_src(aVtx_dst));
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ureg_MAD(ureg, aVtx_dst, _WWWW(vs->aVtx), _CONST(7), ureg_src(aVtx_dst));
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vs->aVtx = ureg_src(aVtx_dst);
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}
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if (need_aNrm) {
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struct ureg_dst aNrm_dst = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ);
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ureg_MUL(ureg, aNrm_dst, _XXXX(vs->aNrm), _CONST(16));
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ureg_MAD(ureg, aNrm_dst, _YYYY(vs->aNrm), _CONST(17), ureg_src(aNrm_dst));
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ureg_MAD(ureg, aNrm_dst, _ZZZZ(vs->aNrm), _CONST(18), ureg_src(aNrm_dst));
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if (key->normalizenormals)
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ureg_normalize3(ureg, aNrm_dst, ureg_src(aNrm_dst));
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vs->aNrm = ureg_src(aNrm_dst);
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if (need_aVtx) {
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struct ureg_dst aVtx_dst = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ);
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ureg_MUL(ureg, aVtx_dst, _XXXX(vs->aVtx), _CONST(4));
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ureg_MAD(ureg, aVtx_dst, _YYYY(vs->aVtx), _CONST(5), ureg_src(aVtx_dst));
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ureg_MAD(ureg, aVtx_dst, _ZZZZ(vs->aVtx), _CONST(6), ureg_src(aVtx_dst));
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ureg_MAD(ureg, aVtx_dst, _WWWW(vs->aVtx), _CONST(7), ureg_src(aVtx_dst));
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vs->aVtx = ureg_src(aVtx_dst);
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}
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if (need_aNrm) {
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struct ureg_dst aNrm_dst = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ);
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ureg_MUL(ureg, aNrm_dst, _XXXX(vs->aNrm), _CONST(16));
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ureg_MAD(ureg, aNrm_dst, _YYYY(vs->aNrm), _CONST(17), ureg_src(aNrm_dst));
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ureg_MAD(ureg, aNrm_dst, _ZZZZ(vs->aNrm), _CONST(18), ureg_src(aNrm_dst));
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if (key->normalizenormals)
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ureg_normalize3(ureg, aNrm_dst, ureg_src(aNrm_dst));
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vs->aNrm = ureg_src(aNrm_dst);
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}
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}
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/* === Process point size:
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