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radeonsi don't get count from pipe_draw_info in si_num_prims_for_vertices
This is needed for multi draws. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>
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1 changed files with 31 additions and 18 deletions
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@ -304,18 +304,18 @@ static void si_emit_derived_tess_state(struct si_context *sctx, const struct pip
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}
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}
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static unsigned si_num_prims_for_vertices(const struct pipe_draw_info *info,
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enum pipe_prim_type prim)
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static unsigned si_num_prims_for_vertices(enum pipe_prim_type prim,
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unsigned count, unsigned vertices_per_patch)
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{
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switch (prim) {
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case PIPE_PRIM_PATCHES:
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return info->count / info->vertices_per_patch;
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return count / vertices_per_patch;
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case PIPE_PRIM_POLYGON:
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return info->count >= 3;
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return count >= 3;
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case SI_PRIM_RECTANGLE_LIST:
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return info->count / 3;
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return count / 3;
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default:
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return u_decomposed_prims_for_vertices(prim, info->count);
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return u_decomposed_prims_for_vertices(prim, count);
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}
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}
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@ -481,7 +481,8 @@ ALWAYS_INLINE
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static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
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const struct pipe_draw_info *info,
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enum pipe_prim_type prim, unsigned num_patches,
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unsigned instance_count, bool primitive_restart)
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unsigned instance_count, bool primitive_restart,
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unsigned min_vertex_count)
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{
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union si_vgt_param_key key = sctx->ia_multi_vgt_param_key;
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unsigned primgroup_size;
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@ -500,7 +501,8 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
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key.u.multi_instances_smaller_than_primgroup =
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info->indirect ||
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(instance_count > 1 &&
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(info->count_from_stream_output || si_num_prims_for_vertices(info, prim) < primgroup_size));
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(info->count_from_stream_output ||
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si_num_prims_for_vertices(prim, min_vertex_count, info->vertices_per_patch) < primgroup_size));
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key.u.primitive_restart = primitive_restart;
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key.u.count_from_stream_output = info->count_from_stream_output != NULL;
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key.u.line_stipple_enabled = si_is_line_stipple_enabled(sctx);
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@ -519,8 +521,11 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
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* only applies it to Hawaii. Do what Vulkan does.
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*/
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if (sctx->family == CHIP_HAWAII && G_028AA8_SWITCH_ON_EOI(ia_multi_vgt_param) &&
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(info->indirect || (instance_count > 1 && (info->count_from_stream_output ||
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si_num_prims_for_vertices(info, prim) <= 1))))
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(info->indirect ||
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(instance_count > 1 &&
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(info->count_from_stream_output ||
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si_num_prims_for_vertices(prim, min_vertex_count, info->vertices_per_patch) <= 1))))
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sctx->flags |= SI_CONTEXT_VGT_FLUSH;
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}
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@ -643,13 +648,15 @@ static bool si_prim_restart_index_changed(struct si_context *sctx, bool primitiv
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ALWAYS_INLINE
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static void si_emit_ia_multi_vgt_param(struct si_context *sctx, const struct pipe_draw_info *info,
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enum pipe_prim_type prim, unsigned num_patches,
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unsigned instance_count, bool primitive_restart)
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unsigned instance_count, bool primitive_restart,
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unsigned min_vertex_count)
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{
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struct radeon_cmdbuf *cs = sctx->gfx_cs;
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unsigned ia_multi_vgt_param;
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ia_multi_vgt_param =
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si_get_ia_multi_vgt_param(sctx, info, prim, num_patches, instance_count, primitive_restart);
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si_get_ia_multi_vgt_param(sctx, info, prim, num_patches, instance_count, primitive_restart,
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min_vertex_count);
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/* Draw state. */
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if (ia_multi_vgt_param != sctx->last_multi_vgt_param) {
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@ -713,7 +720,8 @@ static void gfx10_emit_ge_cntl(struct si_context *sctx, unsigned num_patches)
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ALWAYS_INLINE
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static void si_emit_draw_registers(struct si_context *sctx, const struct pipe_draw_info *info,
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enum pipe_prim_type prim, unsigned num_patches,
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unsigned instance_count, bool primitive_restart)
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unsigned instance_count, bool primitive_restart,
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unsigned min_vertex_count)
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{
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struct radeon_cmdbuf *cs = sctx->gfx_cs;
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unsigned vgt_prim = si_conv_pipe_prim(prim);
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@ -721,7 +729,8 @@ static void si_emit_draw_registers(struct si_context *sctx, const struct pipe_dr
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if (sctx->chip_class >= GFX10)
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gfx10_emit_ge_cntl(sctx, num_patches);
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else
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si_emit_ia_multi_vgt_param(sctx, info, prim, num_patches, instance_count, primitive_restart);
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si_emit_ia_multi_vgt_param(sctx, info, prim, num_patches, instance_count, primitive_restart,
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min_vertex_count);
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if (vgt_prim != sctx->last_prim) {
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if (sctx->chip_class >= GFX10)
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@ -1591,7 +1600,8 @@ static void si_get_draw_start_count(struct si_context *sctx, const struct pipe_d
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static void si_emit_all_states(struct si_context *sctx, const struct pipe_draw_info *info,
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enum pipe_prim_type prim, unsigned instance_count,
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bool primitive_restart, unsigned skip_atom_mask)
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unsigned min_vertex_count, bool primitive_restart,
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unsigned skip_atom_mask)
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{
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unsigned num_patches = 0;
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@ -1622,7 +1632,8 @@ static void si_emit_all_states(struct si_context *sctx, const struct pipe_draw_i
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/* Emit draw states. */
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si_emit_vs_state(sctx, info);
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si_emit_draw_registers(sctx, info, prim, num_patches, instance_count, primitive_restart);
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si_emit_draw_registers(sctx, info, prim, num_patches, instance_count, primitive_restart,
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min_vertex_count);
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}
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static bool si_all_vs_resources_read_only(struct si_context *sctx, struct pipe_resource *indexbuf)
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@ -2096,7 +2107,8 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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masked_atoms |= si_get_atom_bit(sctx, &sctx->atoms.s.render_cond);
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/* Emit all states except possibly render condition. */
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si_emit_all_states(sctx, info, prim, instance_count, primitive_restart, masked_atoms);
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si_emit_all_states(sctx, info, prim, instance_count, info->count,
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primitive_restart, masked_atoms);
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sctx->emit_cache_flush(sctx);
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/* <-- CUs are idle here. */
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@ -2132,7 +2144,8 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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if (sctx->chip_class >= GFX7 && sctx->prefetch_L2_mask)
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cik_emit_prefetch_L2(sctx, true);
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si_emit_all_states(sctx, info, prim, instance_count, primitive_restart, masked_atoms);
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si_emit_all_states(sctx, info, prim, instance_count, info->count,
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primitive_restart, masked_atoms);
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if (gfx9_scissor_bug &&
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(sctx->context_roll || si_is_atom_dirty(sctx, &sctx->atoms.s.scissors))) {
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