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aco: constify radv_shader_{info,args}

Browse source 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13192>
This commit is contained in:
Samuel Pitoiset 2021-10-05 10:32:55 +02:00
parent 64030e79c5
commit d993b59941
7 changed files with 24 additions and 24 deletions
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18
src/amd/compiler/aco_instruction_selection.cpp
View file

@ -5321,7 +5321,7 @@ visit_load_tess_coord(isel_context* ctx, nir_intrinsic_instr* instr)
Temp
load_desc_ptr(isel_context* ctx, unsigned desc_set)
{
struct radv_userdata_locations *user_sgprs_locs = &ctx->program->info->user_sgprs_locs;
const struct radv_userdata_locations *user_sgprs_locs = &ctx->program->info->user_sgprs_locs;
if (user_sgprs_locs->shader_data[AC_UD_INDIRECT_DESCRIPTOR_SETS].sgpr_idx != -1) {
Builder bld(ctx->program, ctx->block);
@ -8154,7 +8154,7 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr)
}
case nir_intrinsic_load_workgroup_id: {
Temp dst = get_ssa_temp(ctx, &instr->dest.ssa);
struct ac_arg* args = ctx->args->ac.workgroup_ids;
const struct ac_arg* args = ctx->args->ac.workgroup_ids;
bld.pseudo(aco_opcode::p_create_vector, Definition(dst),
args[0].used ? Operand(get_arg(ctx, args[0])) : Operand::zero(),
args[1].used ? Operand(get_arg(ctx, args[1])) : Operand::zero(),
@ -10760,9 +10760,9 @@ create_vs_exports(isel_context* ctx)
{
assert(ctx->stage.hw == HWStage::VS || ctx->stage.hw == HWStage::NGG);
radv_vs_output_info* outinfo = (ctx->stage.has(SWStage::TES) && !ctx->stage.has(SWStage::GS))
? &ctx->program->info->tes.outinfo
: &ctx->program->info->vs.outinfo;
const radv_vs_output_info* outinfo = (ctx->stage.has(SWStage::TES) && !ctx->stage.has(SWStage::GS))
? &ctx->program->info->tes.outinfo
: &ctx->program->info->vs.outinfo;
ctx->block->kind |= block_kind_export_end;
@ -11243,7 +11243,7 @@ emit_streamout(isel_context* ctx, unsigned stream)
}
for (unsigned i = 0; i < ctx->program->info->so.num_outputs; i++) {
struct radv_stream_output* output = &ctx->program->info->so.outputs[i];
const struct radv_stream_output* output = &ctx->program->info->so.outputs[i];
if (stream != output->stream)
continue;
@ -11558,7 +11558,7 @@ ngg_emit_sendmsg_gs_alloc_req(isel_context* ctx, Temp vtx_cnt, Temp prm_cnt)
void
select_program(Program* program, unsigned shader_count, struct nir_shader* const* shaders,
ac_shader_config* config, struct radv_shader_args* args)
ac_shader_config* config, const struct radv_shader_args* args)
{
isel_context ctx = setup_isel_context(program, shader_count, shaders, config, args, false);
if_context ic_merged_wave_info;
@ -11676,7 +11676,7 @@ select_program(Program* program, unsigned shader_count, struct nir_shader* const
void
select_gs_copy_shader(Program* program, struct nir_shader* gs_shader, ac_shader_config* config,
struct radv_shader_args* args)
const struct radv_shader_args* args)
{
isel_context ctx = setup_isel_context(program, 1, &gs_shader, config, args, true);
@ -11773,7 +11773,7 @@ select_gs_copy_shader(Program* program, struct nir_shader* gs_shader, ac_shader_
void
select_trap_handler_shader(Program* program, struct nir_shader* shader, ac_shader_config* config,
struct radv_shader_args* args)
const struct radv_shader_args* args)
{
assert(args->options->chip_class == GFX8);

4
src/amd/compiler/aco_instruction_selection.h
View file

@ -48,7 +48,7 @@ struct shader_io_state {
struct isel_context {
const struct radv_nir_compiler_options* options;
struct radv_shader_args* args;
const struct radv_shader_args* args;
Program* program;
nir_shader* shader;
uint32_t constant_data_offset;
@ -116,7 +116,7 @@ void cleanup_context(isel_context* ctx);
isel_context setup_isel_context(Program* program, unsigned shader_count,
struct nir_shader* const* shaders, ac_shader_config* config,
struct radv_shader_args* args, bool is_gs_copy_shader);
const struct radv_shader_args* args, bool is_gs_copy_shader);
} // namespace aco

10
src/amd/compiler/aco_instruction_selection_setup.cpp
View file

@ -248,7 +248,7 @@ get_reg_class(isel_context* ctx, RegType type, unsigned components, unsigned bit
void
setup_vs_output_info(isel_context* ctx, nir_shader* nir, bool export_prim_id,
bool export_clip_dists, radv_vs_output_info* outinfo)
bool export_clip_dists, const radv_vs_output_info* outinfo)
{
ctx->export_clip_dists = export_clip_dists;
ctx->num_clip_distances = util_bitcount(outinfo->clip_dist_mask);
@ -269,7 +269,7 @@ void
setup_vs_variables(isel_context* ctx, nir_shader* nir)
{
if (ctx->stage == vertex_vs || ctx->stage == vertex_ngg) {
radv_vs_output_info* outinfo = &ctx->program->info->vs.outinfo;
const radv_vs_output_info* outinfo = &ctx->program->info->vs.outinfo;
setup_vs_output_info(ctx, nir, outinfo->export_prim_id, outinfo->export_clip_dists, outinfo);
/* TODO: NGG streamout */
@ -292,7 +292,7 @@ setup_gs_variables(isel_context* ctx, nir_shader* nir)
ctx->program->config->lds_size =
ctx->program->info->gs_ring_info.lds_size; /* Already in units of the alloc granularity */
} else if (ctx->stage == vertex_geometry_ngg || ctx->stage == tess_eval_geometry_ngg) {
radv_vs_output_info* outinfo = &ctx->program->info->vs.outinfo;
const radv_vs_output_info* outinfo = &ctx->program->info->vs.outinfo;
setup_vs_output_info(ctx, nir, false, outinfo->export_clip_dists, outinfo);
ctx->program->config->lds_size =
@ -315,7 +315,7 @@ setup_tes_variables(isel_context* ctx, nir_shader* nir)
ctx->tcs_num_patches = ctx->args->shader_info->num_tess_patches;
if (ctx->stage == tess_eval_vs || ctx->stage == tess_eval_ngg) {
radv_vs_output_info* outinfo = &ctx->program->info->tes.outinfo;
const radv_vs_output_info* outinfo = &ctx->program->info->tes.outinfo;
setup_vs_output_info(ctx, nir, outinfo->export_prim_id, outinfo->export_clip_dists, outinfo);
/* TODO: NGG streamout */
@ -823,7 +823,7 @@ cleanup_context(isel_context* ctx)
isel_context
setup_isel_context(Program* program, unsigned shader_count, struct nir_shader* const* shaders,
ac_shader_config* config, struct radv_shader_args* args, bool is_gs_copy_shader)
ac_shader_config* config, const struct radv_shader_args* args, bool is_gs_copy_shader)
{
SWStage sw_stage = SWStage::None;
for (unsigned i = 0; i < shader_count; i++) {

2
src/amd/compiler/aco_interface.cpp
View file

@ -75,7 +75,7 @@ validate(aco::Program* program)
void
aco_compile_shader(unsigned shader_count, struct nir_shader* const* shaders,
struct radv_shader_binary** binary, struct radv_shader_args* args)
struct radv_shader_binary** binary, const struct radv_shader_args* args)
{
aco::init();

2
src/amd/compiler/aco_interface.h
View file

@ -42,7 +42,7 @@ extern const unsigned aco_num_statistics;
extern const struct aco_compiler_statistic_info* aco_statistic_infos;
void aco_compile_shader(unsigned shader_count, struct nir_shader* const* shaders,
struct radv_shader_binary** binary, struct radv_shader_args* args);
struct radv_shader_binary** binary, const struct radv_shader_args* args);
#ifdef __cplusplus
}

2
src/amd/compiler/aco_ir.cpp
View file

@ -65,7 +65,7 @@ init()
}
void
init_program(Program* program, Stage stage, struct radv_shader_info* info,
init_program(Program* program, Stage stage, const struct radv_shader_info* info,
enum chip_class chip_class, enum radeon_family family, bool wgp_mode,
ac_shader_config* config)
{

10
src/amd/compiler/aco_ir.h
View file

@ -2040,7 +2040,7 @@ public:
uint16_t num_waves = 0;
uint16_t max_waves = 0; /* maximum number of waves, regardless of register usage */
ac_shader_config* config;
struct radv_shader_info* info;
const struct radv_shader_info* info;
enum chip_class chip_class;
enum radeon_family family;
DeviceInfo dev;
@ -2135,16 +2135,16 @@ struct ra_test_policy {
void init();
void init_program(Program* program, Stage stage, struct radv_shader_info* info,
void init_program(Program* program, Stage stage, const struct radv_shader_info* info,
enum chip_class chip_class, enum radeon_family family, bool wgp_mode,
ac_shader_config* config);
void select_program(Program* program, unsigned shader_count, struct nir_shader* const* shaders,
ac_shader_config* config, struct radv_shader_args* args);
ac_shader_config* config, const struct radv_shader_args* args);
void select_gs_copy_shader(Program* program, struct nir_shader* gs_shader, ac_shader_config* config,
struct radv_shader_args* args);
const struct radv_shader_args* args);
void select_trap_handler_shader(Program* program, struct nir_shader* shader,
ac_shader_config* config, struct radv_shader_args* args);
ac_shader_config* config, const struct radv_shader_args* args);
void lower_phis(Program* program);
void calc_min_waves(Program* program);