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ir3/a7xx: handle alias.rt dst
alias.rt writes to a render target, not a GPR. Render targets are disassembled as rtN.c. Signed-off-by: Job Noorman <jnoorman@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31222>
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dab47b55ef
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5 changed files with 44 additions and 1 deletions
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@ -156,6 +156,9 @@ typedef enum ir3_register_flags {
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/* Predicate register (p0.c). Cannot be combined with half or shared. */
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IR3_REG_PREDICATE = BIT(19),
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/* Render target dst. Only used by alias.rt. */
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IR3_REG_RT = BIT(20),
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} ir3_register_flags;
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struct ir3_register {
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@ -96,6 +96,9 @@ static int parse_reg(const char *str)
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num++;
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}
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str++;
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if (str[0] == 't') {
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str++;
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}
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num += strtol(str, (char **)&str, 10) << 3;
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switch (str[1]) {
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case 'x': num += 0; break;
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@ -170,6 +173,7 @@ static int parse_reg(const char *str)
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[h]?"r"[0-9]+"."[xyzw] ir3_yylval.num = parse_reg(yytext); return T_REGISTER;
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[h]?"c"[0-9]+"."[xyzw] ir3_yylval.num = parse_reg(yytext); return T_CONSTANT;
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"rt"[0-7]"."[xyzw] ir3_yylval.num = parse_reg(yytext); return T_RT;
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"a0.x" return T_A0;
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"a1.x" return T_A1;
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"p0."[xyzw] ir3_yylval.num = parse_reg(yytext); return T_P0;
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@ -376,6 +376,7 @@ static void print_token(FILE *file, int type, YYSTYPE value)
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%token <str> T_IDENTIFIER
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%token <num> T_REGISTER
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%token <num> T_CONSTANT
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%token <num> T_RT
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/* @ headers (@const/@sampler/@uniform/@varying) */
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%token <tok> T_A_LOCALSIZE
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@ -1443,6 +1444,9 @@ cat7_data_cache: T_OP_DCCLN { new_instr(OPC_DCCLN); }
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| T_OP_DCINV { new_instr(OPC_DCINV); }
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| T_OP_DCFLU { new_instr(OPC_DCFLU); }
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cat7_alias_dst: dst_reg
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| T_RT { new_dst($1, IR3_REG_RT); }
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cat7_alias_src: src_reg_or_const
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| immediate_cat1
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@ -1470,7 +1474,7 @@ cat7_instr: cat7_barrier
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| T_OP_UNLOCK { new_instr(OPC_UNLOCK); }
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| T_OP_ALIAS {
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new_instr(OPC_ALIAS);
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} '.' cat7_alias_scope '.' cat7_alias_type '.' cat7_alias_table_size_minus_one dst_reg ',' cat7_alias_src
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} '.' cat7_alias_scope '.' cat7_alias_type '.' cat7_alias_table_size_minus_one cat7_alias_dst ',' cat7_alias_src
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raw_instr: T_RAW {new_instr(OPC_META_RAW)->raw.value = $1;}
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@ -508,6 +508,19 @@ static const struct test {
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/* dEQP-VK.subgroups.quad.graphics.subgroupquadbroadcast_i16vec2 */
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INSTR_7XX(e45100a0_00000002, "alias.tex.b16.0 hr40.x, h(0x2)"),
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/* dEQP-VK.glsl.derivate.dfdx.constant.float */
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INSTR_7XX(e4508003_00003c00, "alias.rt.f16.0 rt0.w, h(1.000000)"),
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INSTR_7XX(f4488000_00000000, "(sy)alias.rt.f16.0 rt0.x, hc0.x"),
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/* dEQP-VK.glsl.opaque_type_indexing.ubo.const_literal_fragment */
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INSTR_7XX(e44c8008_00000010, "alias.rt.f32.0 rt2.x, c4.x"),
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/* dEQP-VK.dynamic_rendering.primary_cmd_buff.suballocation.multisample_resolve.layers_3.r16g16_unorm.samples_4_resolve_level_4 */
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INSTR_7XX(e4548008_3f800000, "alias.rt.f32.0 rt2.x, (1.000000)"),
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/* dEQP-VK.renderpass.suballocation.multisample_resolve.layers_3.r8g8b8a8_uint.samples_2_baseLayer1 */
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INSTR_7XX(e4558007_000000ff, "alias.rt.b32.0 rt1.w, (0xff)"),
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INSTR_6XX(ffffffff_ffffffff, "raw 0xFFFFFFFFFFFFFFFF"),
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/* clang-format on */
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};
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@ -284,6 +284,18 @@ SOFTWARE.
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<value val="2" display="IMMED"/>
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</enum>
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<bitset name="#dst-rt" size="5">
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<display>
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rt{RT}.{SWIZ}
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</display>
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<field name="SWIZ" low="0" high="1" type="#swiz"/>
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<field name="RT" low="2" high="4" type="uint"/>
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<encode type="struct ir3_register *">
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<map name="RT">src->num >> 2</map>
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<map name="SWIZ">src->num & 0x3</map>
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</encode>
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</bitset>
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<bitset name="alias" extends="#instruction">
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<doc>
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Add an entry to the scope-specific "alias table", when instruction
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@ -335,6 +347,13 @@ SOFTWARE.
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<param name="TYPE_SIZE"/>
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<param name="TYPE"/>
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</field>
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<override>
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<expr>{SCOPE} == 1</expr>
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<field low="32" high="36" name="DST" type="#dst-rt"/>
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<pattern low="37" high="39">000</pattern>
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<derived name="DST_HALF" expr="#false" type="bool" display=""/>
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</override>
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<field low="32" high="39" name="DST" type="#reg-gpr"/>
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<field low="40" high="43" name="TABLE_SIZE_MINUS_ONE" type="uint"/>
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<field pos="44" name="SS" type="bool" display="(ss)"/>
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