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radv: fix barrier in radv_decompress_dcc_compute shader
ACO doesn't create a waitcnt for barriers between texture samples and
image stores because texture samples are supposed to use read-only
memory. It could also schedule the barrier to above the texture sample.
We also have use a larger memory scope to avoid an ACO optimization.
Tested on GFX8 with Sachsa Willems deferred sample. With some DCC
decompressions and the compute path forced.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: 21.1 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9496>
(cherry picked from commit ec70882238)
This commit is contained in:
Rhys Perry
Eric Engestrom
parent
da74e86cb7
commit
d90e5fe88a
4 changed files with 24 additions and 31 deletions
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@ -1066,7 +1066,7 @@
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"description": "radv: fix barrier in radv_decompress_dcc_compute shader",
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"nominated": true,
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"nomination_type": 0,
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"resolution": 0,
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"resolution": 1,
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"master_sha": null,
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"because_sha": null
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},
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@ -1658,7 +1658,8 @@ radv_image_create(VkDevice _device, const struct radv_image_create_info *create_
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static void
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radv_image_view_make_descriptor(struct radv_image_view *iview, struct radv_device *device,
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VkFormat vk_format, const VkComponentMapping *components,
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bool is_storage_image, bool disable_compression, unsigned plane_id,
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bool is_storage_image, bool disable_compression,
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bool enable_compression, unsigned plane_id,
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unsigned descriptor_plane_id)
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{
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struct radv_image *image = iview->image;
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@ -1699,7 +1700,7 @@ radv_image_view_make_descriptor(struct radv_image_view *iview, struct radv_devic
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}
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bool enable_write_compression = radv_image_use_dcc_image_stores(device, image);
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if (is_storage_image && !enable_write_compression)
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if (is_storage_image && !(enable_write_compression || enable_compression))
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disable_compression = true;
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si_set_mutable_tex_desc_fields(device, image, base_level_info, plane_id, iview->base_mip,
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iview->base_mip, blk_w, is_stencil, is_storage_image,
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@ -1898,13 +1899,16 @@ radv_image_view_init(struct radv_image_view *iview, struct radv_device *device,
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iview->support_fast_clear = radv_image_view_can_fast_clear(device, iview);
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bool disable_compression = extra_create_info ? extra_create_info->disable_compression : false;
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bool enable_compression = extra_create_info ? extra_create_info->enable_compression : false;
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for (unsigned i = 0;
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i < (iview->multiple_planes ? vk_format_get_plane_count(image->vk_format) : 1); ++i) {
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VkFormat format = vk_format_get_plane_format(iview->vk_format, i);
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radv_image_view_make_descriptor(iview, device, format, &pCreateInfo->components, false,
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disable_compression, iview->plane_id + i, i);
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disable_compression, enable_compression, iview->plane_id + i,
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i);
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radv_image_view_make_descriptor(iview, device, format, &pCreateInfo->components, true,
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disable_compression, iview->plane_id + i, i);
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disable_compression, enable_compression, iview->plane_id + i,
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i);
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}
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}
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@ -31,8 +31,6 @@
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static nir_shader *
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build_dcc_decompress_compute_shader(struct radv_device *dev)
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{
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const struct glsl_type *buf_type =
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glsl_sampler_type(GLSL_SAMPLER_DIM_2D, false, false, GLSL_TYPE_FLOAT);
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const struct glsl_type *img_type = glsl_image_type(GLSL_SAMPLER_DIM_2D, false, GLSL_TYPE_FLOAT);
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nir_builder b =
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@ -42,7 +40,7 @@ build_dcc_decompress_compute_shader(struct radv_device *dev)
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b.shader->info.cs.local_size[0] = 16;
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b.shader->info.cs.local_size[1] = 16;
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b.shader->info.cs.local_size[2] = 1;
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nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform, buf_type, "s_tex");
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nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform, img_type, "in_img");
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input_img->data.descriptor_set = 0;
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input_img->data.binding = 0;
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@ -57,30 +55,20 @@ build_dcc_decompress_compute_shader(struct radv_device *dev)
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b.shader->info.cs.local_size[2], 0);
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nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id);
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nir_ssa_def *input_img_deref = &nir_build_deref_var(&b, input_img)->dest.ssa;
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nir_tex_instr *tex = nir_tex_instr_create(b.shader, 3);
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tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
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tex->op = nir_texop_txf;
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tex->src[0].src_type = nir_tex_src_coord;
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tex->src[0].src = nir_src_for_ssa(nir_channels(&b, global_id, 3));
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tex->src[1].src_type = nir_tex_src_lod;
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tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0));
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tex->src[2].src_type = nir_tex_src_texture_deref;
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tex->src[2].src = nir_src_for_ssa(input_img_deref);
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tex->dest_type = nir_type_float32;
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tex->is_array = false;
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tex->coord_components = 2;
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nir_ssa_def *data =
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nir_image_deref_load(&b, 4, 32, &nir_build_deref_var(&b, input_img)->dest.ssa, global_id,
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nir_ssa_undef(&b, 1, 32), nir_imm_int(&b, 0));
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nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
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nir_builder_instr_insert(&b, &tex->instr);
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nir_scoped_barrier(&b, .execution_scope = NIR_SCOPE_WORKGROUP,
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.memory_scope = NIR_SCOPE_WORKGROUP, .memory_semantics = NIR_MEMORY_ACQ_REL,
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.memory_modes = nir_var_mem_ssbo);
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/* We need a NIR_SCOPE_DEVICE memory_scope because ACO will avoid
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* creating a vmcnt(0) because it expects the L1 cache to keep memory
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* operations in-order for the same workgroup. The vmcnt(0) seems
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* necessary however. */
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nir_scoped_barrier(&b, .execution_scope = NIR_SCOPE_WORKGROUP, .memory_scope = NIR_SCOPE_DEVICE,
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.memory_semantics = NIR_MEMORY_ACQ_REL, .memory_modes = nir_var_mem_ssbo);
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nir_image_deref_store(&b, &nir_build_deref_var(&b, output_img)->dest.ssa, global_id,
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nir_ssa_undef(&b, 1, 32), &tex->dest.ssa, nir_imm_int(&b, 0));
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nir_ssa_undef(&b, 1, 32), data, nir_imm_int(&b, 0));
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return b.shader;
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}
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@ -96,7 +84,7 @@ create_dcc_compress_compute(struct radv_device *device)
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.bindingCount = 2,
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.pBindings = (VkDescriptorSetLayoutBinding[]){
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{.binding = 0,
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.descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
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.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
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.descriptorCount = 1,
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.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
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.pImmutableSamplers = NULL},
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@ -849,7 +837,7 @@ radv_decompress_dcc_compute(struct radv_cmd_buffer *cmd_buffer, struct radv_imag
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.baseArrayLayer = subresourceRange->baseArrayLayer + s,
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.layerCount = 1},
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},
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NULL);
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&(struct radv_image_view_extra_create_info){.enable_compression = true});
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radv_image_view_init(
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&store_iview, cmd_buffer->device,
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&(VkImageViewCreateInfo){
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@ -873,7 +861,7 @@ radv_decompress_dcc_compute(struct radv_cmd_buffer *cmd_buffer, struct radv_imag
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.dstBinding = 0,
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.dstArrayElement = 0,
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.descriptorCount = 1,
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.descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
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.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
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.pImageInfo =
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(VkDescriptorImageInfo[]){
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{
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@ -2175,6 +2175,7 @@ bool radv_android_gralloc_supports_format(VkFormat format, VkImageUsageFlagBits
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struct radv_image_view_extra_create_info {
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bool disable_compression;
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bool enable_compression;
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};
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void radv_image_view_init(struct radv_image_view *view, struct radv_device *device,
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