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aco/optimizer: delete apply_extract
Foz-DB Navi21: Totals from 35 (0.04% of 79789) affected shaders: Instrs: 166213 -> 166149 (-0.04%); split: -0.05%, +0.01% CodeSize: 946604 -> 945856 (-0.08%); split: -0.08%, +0.01% Latency: 2770103 -> 2769799 (-0.01%); split: -0.01%, +0.00% InvThroughput: 1312839 -> 1312685 (-0.01%) Copies: 31100 -> 31033 (-0.22%); split: -0.26%, +0.05% VALU: 114493 -> 114393 (-0.09%); split: -0.09%, +0.00% SALU: 27249 -> 27285 (+0.13%) Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35272>
This commit is contained in:
Georg Lehmann
Marge Bot
parent
26da5cf8d9
commit
d90976bbad
1 changed files with 60 additions and 136 deletions
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@ -1935,136 +1935,11 @@ can_apply_extract(opt_ctx& ctx, aco_ptr<Instruction>& instr, unsigned idx, ssa_i
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} else if (sel.size() == 2 && ((instr->opcode == aco_opcode::s_pack_lh_b32_b16 && idx == 0) ||
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(instr->opcode == aco_opcode::s_pack_hl_b32_b16 && idx == 1))) {
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return true;
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} else if (instr->opcode == aco_opcode::p_extract ||
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instr->opcode == aco_opcode::p_extract_vector) {
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if (ctx.program->gfx_level < GFX9 &&
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!info.parent_instr->operands[0].isOfType(RegType::vgpr) &&
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instr->definitions[0].regClass().is_subdword())
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return false;
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SubdwordSel instrSel = parse_extract(instr.get());
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return instrSel && apply_extract_twice(sel, instr->operands[idx].getTemp(), instrSel,
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instr->definitions[0].getTemp());
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}
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return false;
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}
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/* Combine an p_extract (or p_insert, in some cases) instruction with instr.
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* instr(p_extract(...)) -> instr()
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*/
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void
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apply_extract(opt_ctx& ctx, aco_ptr<Instruction>& instr, unsigned idx, ssa_info& info)
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{
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Temp tmp = info.parent_instr->operands[0].getTemp();
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SubdwordSel sel = parse_extract(info.parent_instr);
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assert(sel);
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instr->operands[idx].set16bit(false);
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instr->operands[idx].set24bit(false);
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ctx.info[tmp.id()].label &= ~label_insert;
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if (sel.size() == instr->operands[idx].bytes() && sel.size() == tmp.bytes() &&
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tmp.type() == instr->operands[idx].regClass().type()) {
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/* extract is a no-op */
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} else if ((instr->opcode == aco_opcode::v_cvt_f32_u32 ||
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instr->opcode == aco_opcode::v_cvt_f32_i32 ||
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instr->opcode == aco_opcode::v_cvt_f32_ubyte0) &&
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sel.size() == 1 && !sel.sign_extend() && !instr->usesModifiers()) {
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switch (sel.offset()) {
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case 0: instr->opcode = aco_opcode::v_cvt_f32_ubyte0; break;
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case 1: instr->opcode = aco_opcode::v_cvt_f32_ubyte1; break;
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case 2: instr->opcode = aco_opcode::v_cvt_f32_ubyte2; break;
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case 3: instr->opcode = aco_opcode::v_cvt_f32_ubyte3; break;
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}
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} else if (instr->opcode == aco_opcode::v_lshlrev_b32 && instr->operands[0].isConstant() &&
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sel.offset() == 0 && !instr->usesModifiers() &&
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((sel.size() == 2 && instr->operands[0].constantValue() >= 16u) ||
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(sel.size() == 1 && instr->operands[0].constantValue() >= 24u))) {
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/* The undesirable upper bits are already shifted out. */
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if (!instr->isVOP3() && !info.parent_instr->operands[0].isOfType(RegType::vgpr))
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instr->format = asVOP3(instr->format);
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return;
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} else if (instr->opcode == aco_opcode::v_mul_u32_u24 && ctx.program->gfx_level >= GFX10 &&
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!instr->usesModifiers() && sel.size() == 2 && !sel.sign_extend() &&
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(instr->operands[!idx].is16bit() ||
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instr->operands[!idx].constantValue() <= UINT16_MAX)) {
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Instruction* mad = create_instruction(aco_opcode::v_mad_u32_u16, Format::VOP3, 3, 1);
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mad->definitions[0] = instr->definitions[0];
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mad->operands[0] = instr->operands[0];
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mad->operands[1] = instr->operands[1];
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mad->operands[2] = Operand::zero();
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mad->valu().opsel[idx] = sel.offset();
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mad->pass_flags = instr->pass_flags;
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instr.reset(mad);
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} else if (can_use_SDWA(ctx.program->gfx_level, instr, true) &&
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(tmp.type() == RegType::vgpr || ctx.program->gfx_level >= GFX9)) {
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if (instr->isSDWA()) {
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instr->sdwa().sel[idx] = apply_extract_twice(sel, instr->operands[idx].getTemp(),
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instr->sdwa().sel[idx], Temp(0, v1));
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} else {
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convert_to_SDWA(ctx.program->gfx_level, instr);
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instr->sdwa().sel[idx] = sel;
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}
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} else if (instr->isVALU()) {
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if (sel.offset()) {
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instr->valu().opsel[idx] = true;
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/* VOP12C cannot use opsel with SGPRs. */
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if (!instr->isVOP3() && !instr->isVINTERP_INREG() &&
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!info.parent_instr->operands[0].isOfType(RegType::vgpr))
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instr->format = asVOP3(instr->format);
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}
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} else if (instr->opcode == aco_opcode::s_pack_ll_b32_b16) {
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if (sel.offset())
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instr->opcode = idx ? aco_opcode::s_pack_lh_b32_b16 : aco_opcode::s_pack_hl_b32_b16;
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} else if (instr->opcode == aco_opcode::s_pack_lh_b32_b16 ||
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instr->opcode == aco_opcode::s_pack_hl_b32_b16) {
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if (sel.offset())
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instr->opcode = aco_opcode::s_pack_hh_b32_b16;
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} else if (instr->opcode == aco_opcode::p_extract) {
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SubdwordSel instr_sel = parse_extract(instr.get());
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SubdwordSel new_sel = apply_extract_twice(sel, instr->operands[idx].getTemp(), instr_sel,
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instr->definitions[0].getTemp());
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assert(new_sel.size() <= 2);
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instr->operands[1] = Operand::c32(new_sel.offset() / new_sel.size());
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instr->operands[2] = Operand::c32(new_sel.size() * 8u);
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instr->operands[3] = Operand::c32(new_sel.sign_extend());
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return;
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} else if (instr->opcode == aco_opcode::p_extract_vector) {
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SubdwordSel instrSel = parse_extract(instr.get());
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SubdwordSel new_sel = apply_extract_twice(sel, instr->operands[idx].getTemp(), instrSel,
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instr->definitions[0].getTemp());
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assert(new_sel.size() <= 2);
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if (new_sel.size() == instr->definitions[0].bytes()) {
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instr->operands[1] = Operand::c32(new_sel.offset() / instr->definitions[0].bytes());
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return;
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} else {
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/* parse_extract() only succeeds with p_extract_vector for VGPR definitions because there
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* are no sub-dword SGPR regclasses. */
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assert(instr->definitions[0].regClass().type() != RegType::sgpr);
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Instruction* ext = create_instruction(aco_opcode::p_extract, Format::PSEUDO, 4, 1);
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ext->definitions[0] = instr->definitions[0];
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ext->operands[0] = instr->operands[0];
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ext->operands[1] = Operand::c32(new_sel.offset() / new_sel.size());
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ext->operands[2] = Operand::c32(new_sel.size() * 8u);
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ext->operands[3] = Operand::c32(new_sel.sign_extend());
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ext->pass_flags = instr->pass_flags;
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instr.reset(ext);
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}
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}
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/* These are the only labels worth keeping at the moment. */
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for (Definition& def : instr->definitions) {
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ctx.info[def.tempId()].label &= instr_mod_labels;
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ctx.info[def.tempId()].parent_instr = instr.get();
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}
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}
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void
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check_sdwa_extract(opt_ctx& ctx, aco_ptr<Instruction>& instr)
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{
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@ -2456,6 +2331,61 @@ alu_propagate_temp_const(opt_ctx& ctx, aco_ptr<Instruction>& instr, bool uses_va
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ctx.info[def.tempId()].label &= instr_mod_labels | label_canonicalized;
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}
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void
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extract_apply_extract(opt_ctx& ctx, aco_ptr<Instruction>& instr)
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{
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if (!ctx.info[instr->operands[0].tempId()].is_extract())
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return;
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alu_opt_op outer;
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aco_type outer_type;
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if (!parse_operand(ctx, instr->operands[0].getTemp(), outer, outer_type))
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return;
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if (instr->definitions[0].bytes() < 4 && outer.op.isOfType(RegType::sgpr) &&
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ctx.program->gfx_level < GFX9)
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return;
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alu_opt_op inner = {};
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inner.op = instr->operands[0];
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inner.extract[0] = parse_extract(instr.get());
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if (!inner.extract[0])
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return;
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aco_type inner_type = {};
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inner_type.base_type = aco_base_type_uint;
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inner_type.num_components = 1;
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inner_type.bit_size = instr->definitions[0].bytes() * 8;
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if (!combine_operand(ctx, inner, inner_type, outer, outer_type, false))
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return;
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assert(inner.extract[0].size() <= 2);
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aco_opcode new_opcode = inner.extract[0].size() == instr->definitions[0].bytes()
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? aco_opcode::p_extract_vector
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: aco_opcode::p_extract;
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if (new_opcode != instr->opcode) {
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assert(instr->definitions[0].regClass().type() == RegType::vgpr);
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unsigned new_ops = new_opcode == aco_opcode::p_extract_vector ? 2 : 4;
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Instruction* new_instr = create_instruction(new_opcode, Format::PSEUDO, new_ops, 1);
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new_instr->definitions[0] = instr->definitions[0];
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new_instr->pass_flags = instr->pass_flags;
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instr.reset(new_instr);
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}
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instr->operands[0] = inner.op;
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if (instr->opcode == aco_opcode::p_extract_vector) {
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instr->operands[1] = Operand::c32(inner.extract[0].offset() / instr->definitions[0].bytes());
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} else {
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instr->operands[1] = Operand::c32(inner.extract[0].offset() / inner.extract[0].size());
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instr->operands[2] = Operand::c32(inner.extract[0].size() * 8u);
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instr->operands[3] = Operand::c32(inner.extract[0].sign_extend());
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}
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}
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void
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label_instruction(opt_ctx& ctx, aco_ptr<Instruction>& instr)
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{
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@ -2620,6 +2550,9 @@ label_instruction(opt_ctx& ctx, aco_ptr<Instruction>& instr)
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return;
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}
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if (instr->opcode == aco_opcode::p_extract || instr->opcode == aco_opcode::p_extract_vector)
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extract_apply_extract(ctx, instr);
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if (instr->isVALU() || (instr->isVINTRP() && instr->opcode != aco_opcode::v_interp_mov_f32)) {
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if (instr_info.alu_opcode_infos[(int)instr->opcode].output_modifiers || instr->isVINTRP() ||
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instr->opcode == aco_opcode::v_cndmask_b32) {
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@ -4624,17 +4557,8 @@ combine_instruction(opt_ctx& ctx, aco_ptr<Instruction>& instr)
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if (instr->isSDWA() || instr->isDPP())
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return;
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if (instr->opcode == aco_opcode::p_extract || instr->opcode == aco_opcode::p_extract_vector) {
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ssa_info& info = ctx.info[instr->operands[0].tempId()];
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if (info.is_extract() && can_apply_extract(ctx, instr, 0, info)) {
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apply_extract(ctx, instr, 0, info);
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if (--ctx.uses[instr->operands[0].tempId()])
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ctx.uses[info.parent_instr->operands[0].tempId()]++;
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instr->operands[0].setTemp(info.parent_instr->operands[0].getTemp());
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}
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if (instr->opcode == aco_opcode::p_extract)
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apply_load_extract(ctx, instr);
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if (instr->opcode == aco_opcode::p_extract) {
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apply_load_extract(ctx, instr);
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}
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/* TODO: There are still some peephole optimizations that could be done:
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