mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-08 15:38:09 +02:00
nv50: turn off verbose debug output by default
This commit is contained in:
parent
3844c36594
commit
d90502b2b4
7 changed files with 49 additions and 71 deletions
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@ -20,6 +20,8 @@
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* SOFTWARE.
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* SOFTWARE.
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*/
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*/
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/* #define NV50PC_DEBUG */
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#include "nv50_pc.h"
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#include "nv50_pc.h"
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#include "nv50_program.h"
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#include "nv50_program.h"
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@ -311,7 +313,7 @@ nv50_emit_program(struct nv_pc *pc)
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uint32_t *code = pc->emit;
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uint32_t *code = pc->emit;
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int n;
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int n;
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debug_printf("emitting program: size = %u\n", pc->bin_size);
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NV50_DBGMSG("emitting program: size = %u\n", pc->bin_size);
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for (n = 0; n < pc->num_blocks; ++n) {
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for (n = 0; n < pc->num_blocks; ++n) {
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struct nv_instruction *i;
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struct nv_instruction *i;
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@ -336,7 +338,9 @@ nv50_emit_program(struct nv_pc *pc)
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pc->emit = code;
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pc->emit = code;
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code[pc->bin_size / 4 - 1] |= 1;
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code[pc->bin_size / 4 - 1] |= 1;
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#ifdef NV50PC_DEBUG
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nvcg_show_bincode(pc);
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nvcg_show_bincode(pc);
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#endif
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return 0;
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return 0;
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}
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}
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@ -354,7 +358,9 @@ nv50_generate_code(struct nv50_translation_info *ti)
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ret = nv50_tgsi_to_nc(pc, ti);
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ret = nv50_tgsi_to_nc(pc, ti);
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if (ret)
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if (ret)
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goto out;
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goto out;
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#ifdef NV50PC_DEBUG
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nv_print_program(pc->root);
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nv_print_program(pc->root);
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#endif
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/* optimization */
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/* optimization */
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ret = nv_pc_exec_pass0(pc);
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ret = nv_pc_exec_pass0(pc);
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@ -392,7 +398,7 @@ nv50_generate_code(struct nv50_translation_info *ti)
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ti->p->fixups = pc->fixups;
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ti->p->fixups = pc->fixups;
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ti->p->num_fixups = pc->num_fixups;
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ti->p->num_fixups = pc->num_fixups;
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debug_printf("SHADER TRANSLATION - %s\n", ret ? "failure" : "success");
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NV50_DBGMSG("SHADER TRANSLATION - %s\n", ret ? "failure" : "success");
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out:
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out:
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nv_pc_free_refs(pc);
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nv_pc_free_refs(pc);
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@ -492,7 +498,7 @@ nv_nvi_delete(struct nv_instruction *nvi)
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if (nvi == b->phi) {
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if (nvi == b->phi) {
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if (nvi->opcode != NV_OP_PHI)
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if (nvi->opcode != NV_OP_PHI)
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debug_printf("NOTE: b->phi points to non-PHI instruction\n");
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NV50_DBGMSG("NOTE: b->phi points to non-PHI instruction\n");
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assert(!nvi->prev);
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assert(!nvi->prev);
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if (!nvi->next || nvi->next->opcode != NV_OP_PHI)
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if (!nvi->next || nvi->next->opcode != NV_OP_PHI)
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@ -23,6 +23,12 @@
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#ifndef __NV50_COMPILER_H__
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#ifndef __NV50_COMPILER_H__
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#define __NV50_COMPILER_H__
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#define __NV50_COMPILER_H__
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#ifdef NV50PC_DEBUG
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# define NV50_DBGMSG(args...) debug_printf(args)
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#else
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# define NV50_DBGMSG(args...)
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#endif
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#include "pipe/p_defines.h"
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#include "pipe/p_defines.h"
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#include "util/u_inlines.h"
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#include "util/u_inlines.h"
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#include "util/u_memory.h"
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#include "util/u_memory.h"
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@ -239,8 +239,7 @@ set_dst(struct nv_pc *pc, struct nv_value *value)
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struct nv_reg *reg = &value->join->reg;
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struct nv_reg *reg = &value->join->reg;
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if (reg->id < 0) {
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if (reg->id < 0) {
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debug_printf("WARNING: unused dst, hope we can bucket it !\n");
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pc->emit[0] |= (127 << 2) | 1; /* set 'long'-bit to catch bugs */
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pc->emit[0] |= 127 << 2;
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pc->emit[1] |= 0x8;
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pc->emit[1] |= 0x8;
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return;
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return;
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}
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}
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@ -249,7 +248,7 @@ set_dst(struct nv_pc *pc, struct nv_value *value)
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pc->emit[1] |= 0x8;
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pc->emit[1] |= 0x8;
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else
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else
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if (reg->file == NV_FILE_ADDR)
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if (reg->file == NV_FILE_ADDR)
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assert(0);
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assert(0);
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pc->emit[0] |= reg->id << 2;
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pc->emit[0] |= reg->id << 2;
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}
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}
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@ -801,8 +800,8 @@ emit_flop(struct nv_pc *pc, struct nv_instruction *i)
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pc->emit[0] = 0x90000000;
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pc->emit[0] = 0x90000000;
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assert(SREG(src0)->type == NV_TYPE_F32);
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assert(STYPE(i, 0) == NV_TYPE_F32);
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assert(SREG(src0)->file == NV_FILE_GPR);
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assert(SFILE(i, 0) == NV_FILE_GPR);
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if (!i->is_long) {
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if (!i->is_long) {
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emit_form_MUL(pc, i);
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emit_form_MUL(pc, i);
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@ -1057,7 +1056,7 @@ emit_ddy(struct nv_pc *pc, struct nv_instruction *i)
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void
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void
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nv50_emit_instruction(struct nv_pc *pc, struct nv_instruction *i)
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nv50_emit_instruction(struct nv_pc *pc, struct nv_instruction *i)
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{
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{
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// nv_print_instruction(i);
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/* nv_print_instruction(i); */
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switch (i->opcode) {
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switch (i->opcode) {
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case NV_OP_MOV:
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case NV_OP_MOV:
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@ -20,6 +20,8 @@
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* SOFTWARE.
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* SOFTWARE.
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*/
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*/
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/* #define NV50PC_DEBUG */
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#include "nv50_pc.h"
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#include "nv50_pc.h"
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#define DESCEND_ARBITRARY(j, f) \
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#define DESCEND_ARBITRARY(j, f) \
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@ -109,7 +111,7 @@ nvi_isnop(struct nv_instruction *nvi)
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return FALSE;
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return FALSE;
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if (nvi->src[0]->value->join->reg.id < 0) {
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if (nvi->src[0]->value->join->reg.id < 0) {
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debug_printf("nvi_isnop: orphaned value detected\n");
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NV50_DBGMSG("nvi_isnop: orphaned value detected\n");
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return TRUE;
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return TRUE;
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}
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}
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@ -176,9 +178,6 @@ nv_pc_pass_pre_emission(void *priv, struct nv_basic_block *b)
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nv50_inst_min_size(nvi->next) == 4 &&
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nv50_inst_min_size(nvi->next) == 4 &&
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inst_commutation_legal(nvi, nvi->next)) {
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inst_commutation_legal(nvi, nvi->next)) {
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++n32;
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++n32;
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debug_printf("permuting: ");
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nv_print_instruction(nvi);
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nv_print_instruction(nvi->next);
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nv_nvi_permute(nvi, nvi->next);
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nv_nvi_permute(nvi, nvi->next);
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next = nvi;
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next = nvi;
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} else {
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} else {
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@ -193,7 +192,7 @@ nv_pc_pass_pre_emission(void *priv, struct nv_basic_block *b)
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}
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}
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if (!b->entry) {
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if (!b->entry) {
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debug_printf("block %p is now empty\n", b);
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NV50_DBGMSG("block %p is now empty\n", b);
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} else
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} else
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if (!b->exit->is_long) {
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if (!b->exit->is_long) {
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assert(n32);
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assert(n32);
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@ -221,7 +220,7 @@ nv_pc_exec_pass2(struct nv_pc *pc)
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pc->pass_seq++;
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pc->pass_seq++;
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nv_pass_flatten(&pass, pc->root);
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nv_pass_flatten(&pass, pc->root);
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debug_printf("preparing %u blocks for emission\n", pc->num_blocks);
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NV50_DBGMSG("preparing %u blocks for emission\n", pc->num_blocks);
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pc->bb_list = CALLOC(pc->num_blocks, sizeof(struct nv_basic_block *));
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pc->bb_list = CALLOC(pc->num_blocks, sizeof(struct nv_basic_block *));
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pc->num_blocks = 0;
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pc->num_blocks = 0;
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@ -708,21 +707,6 @@ nv_pass_lower_arith(struct nv_pass *ctx, struct nv_basic_block *b)
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return 0;
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return 0;
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}
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}
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/*
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set $r2 g f32 $r2 $r3
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cvt abs rn f32 $r2 s32 $r2
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cvt f32 $c0 # f32 $r2
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e $c0 bra 0x80
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*/
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#if 0
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static int
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nv_pass_lower_cond(struct nv_pass *ctx, struct nv_basic_block *b)
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{
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/* XXX: easier in IR builder for now */
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return 0;
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}
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#endif
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/* TODO: redundant store elimination */
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/* TODO: redundant store elimination */
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struct load_record {
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struct load_record {
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@ -936,7 +920,7 @@ nv_pass_flatten(struct nv_pass *ctx, struct nv_basic_block *b)
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if (bb_is_if_else_endif(b)) {
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if (bb_is_if_else_endif(b)) {
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debug_printf("pass_flatten: IF/ELSE/ENDIF construct at BB:%i\n", b->id);
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NV50_DBGMSG("pass_flatten: IF/ELSE/ENDIF construct at BB:%i\n", b->id);
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for (n0 = 0, nvi = b->out[0]->entry; nvi; nvi = nvi->next, ++n0)
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for (n0 = 0, nvi = b->out[0]->entry; nvi; nvi = nvi->next, ++n0)
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if (!nv50_nvi_can_predicate(nvi))
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if (!nv50_nvi_can_predicate(nvi))
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@ -945,11 +929,13 @@ nv_pass_flatten(struct nv_pass *ctx, struct nv_basic_block *b)
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for (n1 = 0, nvi = b->out[1]->entry; nvi; nvi = nvi->next, ++n1)
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for (n1 = 0, nvi = b->out[1]->entry; nvi; nvi = nvi->next, ++n1)
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if (!nv50_nvi_can_predicate(nvi))
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if (!nv50_nvi_can_predicate(nvi))
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break;
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break;
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#ifdef NV50_PC_DEBUG
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if (nvi) {
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if (nvi) {
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debug_printf("cannot predicate: "); nv_print_instruction(nvi);
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debug_printf("cannot predicate: "); nv_print_instruction(nvi);
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}
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}
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} else {
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} else {
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debug_printf("cannot predicate: "); nv_print_instruction(nvi);
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debug_printf("cannot predicate: "); nv_print_instruction(nvi);
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#endif
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}
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}
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if (!nvi && n0 < 12 && n1 < 12) { /* 12 as arbitrary limit */
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if (!nvi && n0 < 12 && n1 < 12) { /* 12 as arbitrary limit */
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@ -20,6 +20,8 @@
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* SOFTWARE.
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* SOFTWARE.
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*/
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*/
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/* #define NV50PC_DEBUG */
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#include "nv50_context.h"
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#include "nv50_context.h"
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#include "nv50_pc.h"
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#include "nv50_pc.h"
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@ -112,15 +114,8 @@ add_range(struct nv_value *val, struct nv_basic_block *b, int end)
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if (bgn < b->entry->serial || bgn > b->exit->serial)
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if (bgn < b->entry->serial || bgn > b->exit->serial)
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bgn = b->entry->serial;
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bgn = b->entry->serial;
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if (bgn > end) {
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debug_printf("Aieee! BLOCK [%i, %i], RANGE [%i, %i)\n",
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b->entry->serial, b->exit->serial, bgn, end);
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}
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assert(bgn <= end);
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assert(bgn <= end);
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if (bgn < val->insn->serial)
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debug_printf("WARNING: leaking value %i ?\n", val->n);
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add_range_ex(val, bgn, end, NULL);
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add_range_ex(val, bgn, end, NULL);
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}
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}
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@ -559,12 +554,8 @@ pass_build_live_sets(struct nv_pc_pass *ctx, struct nv_basic_block *b)
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struct nv_instruction *i;
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struct nv_instruction *i;
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int j, n, ret = 0;
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int j, n, ret = 0;
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debug_printf("pass_build_live_sets BB:%i\n", b->id);
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if (b->pass_seq >= ctx->pc->pass_seq)
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if (b->pass_seq >= ctx->pc->pass_seq) {
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debug_printf("already visited\n");
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return 0;
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return 0;
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}
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b->pass_seq = ctx->pc->pass_seq;
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b->pass_seq = ctx->pc->pass_seq;
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/* slight hack for undecidedness: set phi = entry if it's undefined */
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/* slight hack for undecidedness: set phi = entry if it's undefined */
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@ -595,13 +586,10 @@ pass_build_live_sets(struct nv_pc_pass *ctx, struct nv_basic_block *b)
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break;
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break;
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assert(i->src[j]->value->insn);
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assert(i->src[j]->value->insn);
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if (nvbb_reachable_by(b, i->src[j]->value->insn->bb, b->out[n])) {
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if (nvbb_reachable_by(b, i->src[j]->value->insn->bb, b->out[n]))
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live_set_add(b, i->src[j]->value);
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live_set_add(b, i->src[j]->value);
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debug_printf("BB:%i liveset + %i\n", b->id, i->src[j]->value->n);
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else
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} else {
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live_set_rem(b, i->src[j]->value);
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live_set_rem(b, i->src[j]->value);
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debug_printf("BB:%i liveset - %i\n", b->id, i->src[j]->value->n);
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}
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}
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}
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}
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}
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}
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}
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@ -653,7 +641,7 @@ static void collect_live_values(struct nv_basic_block *b, const int n)
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}
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}
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}
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}
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/* NOTE: the live intervals of phi functions start the the first non-phi instruction */
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/* NOTE: the live intervals of phi functions start at the first non-phi insn. */
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static int
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static int
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pass_build_intervals(struct nv_pc_pass *ctx, struct nv_basic_block *b)
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pass_build_intervals(struct nv_pc_pass *ctx, struct nv_basic_block *b)
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{
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{
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@ -661,8 +649,6 @@ pass_build_intervals(struct nv_pc_pass *ctx, struct nv_basic_block *b)
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int j, s;
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int j, s;
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const int n = (ctx->pc->num_values + 31) / 32;
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const int n = (ctx->pc->num_values + 31) / 32;
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debug_printf("building intervals for BB %i\n", b->id);
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/* verify that first block does not have live-in values */
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/* verify that first block does not have live-in values */
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if (b->num_in == 0)
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if (b->num_in == 0)
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for (j = 0; j < n; ++j)
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for (j = 0; j < n; ++j)
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@ -700,7 +686,6 @@ pass_build_intervals(struct nv_pc_pass *ctx, struct nv_basic_block *b)
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add_range(&ctx->pc->values[j], b, b->exit->serial + 1);
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add_range(&ctx->pc->values[j], b, b->exit->serial + 1);
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}
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}
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}
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}
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debug_printf("%s: looping through instructions now\n", __func__);
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i_stop = b->entry ? b->entry->prev : NULL;
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i_stop = b->entry ? b->entry->prev : NULL;
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@ -763,8 +748,6 @@ insert_ordered_tail(struct nv_value *list, struct nv_value *nval)
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{
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{
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struct nv_value *elem = list->prev;
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struct nv_value *elem = list->prev;
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// debug_printf("inserting value %i\n", nval->n);
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for (elem = list->prev;
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for (elem = list->prev;
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elem != list && elem->livei->bgn > nval->livei->bgn;
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elem != list && elem->livei->bgn > nval->livei->bgn;
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elem = elem->prev);
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elem = elem->prev);
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@ -818,8 +801,6 @@ pass_linear_scan(struct nv_pc_pass *ctx, int iter)
|
||||||
foreach_s(cur, tmp[0], &unhandled) {
|
foreach_s(cur, tmp[0], &unhandled) {
|
||||||
remove_from_list(cur);
|
remove_from_list(cur);
|
||||||
|
|
||||||
/* debug_printf("handling value %i\n", cur->n); */
|
|
||||||
|
|
||||||
foreach_s(val, tmp[1], &active) {
|
foreach_s(val, tmp[1], &active) {
|
||||||
if (livei_end(val) <= cur->livei->bgn) {
|
if (livei_end(val) <= cur->livei->bgn) {
|
||||||
reg_release(&free, val);
|
reg_release(&free, val);
|
||||||
|
|
@ -878,23 +859,19 @@ nv_pc_exec_pass1(struct nv_pc *pc)
|
||||||
struct nv_pc_pass *ctx;
|
struct nv_pc_pass *ctx;
|
||||||
int i, ret;
|
int i, ret;
|
||||||
|
|
||||||
debug_printf("REGISTER ALLOCATION - entering\n");
|
NV50_DBGMSG("REGISTER ALLOCATION - entering\n");
|
||||||
|
|
||||||
ctx = CALLOC_STRUCT(nv_pc_pass);
|
ctx = CALLOC_STRUCT(nv_pc_pass);
|
||||||
if (!ctx)
|
if (!ctx)
|
||||||
return -1;
|
return -1;
|
||||||
ctx->pc = pc;
|
ctx->pc = pc;
|
||||||
|
|
||||||
nv_print_program(ctx->pc->root);
|
|
||||||
|
|
||||||
ctx->insns = CALLOC(NV_PC_MAX_INSTRUCTIONS, sizeof(struct nv_instruction *));
|
ctx->insns = CALLOC(NV_PC_MAX_INSTRUCTIONS, sizeof(struct nv_instruction *));
|
||||||
|
|
||||||
pc->pass_seq++;
|
pc->pass_seq++;
|
||||||
ret = pass_generate_phi_movs(ctx, pc->root);
|
ret = pass_generate_phi_movs(ctx, pc->root);
|
||||||
assert(!ret);
|
assert(!ret);
|
||||||
|
|
||||||
nv_print_program(ctx->pc->root);
|
|
||||||
|
|
||||||
for (i = 0; i < pc->loop_nesting_bound; ++i) {
|
for (i = 0; i < pc->loop_nesting_bound; ++i) {
|
||||||
pc->pass_seq++;
|
pc->pass_seq++;
|
||||||
ret = pass_build_live_sets(ctx, pc->root);
|
ret = pass_build_live_sets(ctx, pc->root);
|
||||||
|
|
@ -934,8 +911,7 @@ nv_pc_exec_pass1(struct nv_pc *pc)
|
||||||
for (i = 0; i < pc->num_values; ++i)
|
for (i = 0; i < pc->num_values; ++i)
|
||||||
livei_release(&pc->values[i]);
|
livei_release(&pc->values[i]);
|
||||||
|
|
||||||
debug_printf("REGISTER ALLOCATION - leaving\n");
|
NV50_DBGMSG("REGISTER ALLOCATION - leaving\n");
|
||||||
nv_print_program(ctx->pc->root);
|
|
||||||
|
|
||||||
out:
|
out:
|
||||||
FREE(ctx);
|
FREE(ctx);
|
||||||
|
|
|
||||||
|
|
@ -20,6 +20,8 @@
|
||||||
* SOFTWARE.
|
* SOFTWARE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/* #define NV50_PROGRAM_DEBUG */
|
||||||
|
|
||||||
#include "nv50_program.h"
|
#include "nv50_program.h"
|
||||||
#include "nv50_pc.h"
|
#include "nv50_pc.h"
|
||||||
#include "nv50_context.h"
|
#include "nv50_context.h"
|
||||||
|
|
@ -187,8 +189,6 @@ prog_immediate(struct nv50_translation_info *ti,
|
||||||
int c;
|
int c;
|
||||||
unsigned n = ++ti->immd32_nr;
|
unsigned n = ++ti->immd32_nr;
|
||||||
|
|
||||||
tgsi_dump_immediate(imm);
|
|
||||||
|
|
||||||
if (n == (1 << (ffs(n) - 1)))
|
if (n == (1 << (ffs(n) - 1)))
|
||||||
ti->immd32 = REALLOC(ti->immd32, (n / 2) * 16, (n * 2) * 16);
|
ti->immd32 = REALLOC(ti->immd32, (n / 2) * 16, (n * 2) * 16);
|
||||||
|
|
||||||
|
|
@ -228,7 +228,6 @@ prog_decl(struct nv50_translation_info *ti,
|
||||||
sn = decl->Semantic.Name;
|
sn = decl->Semantic.Name;
|
||||||
si = decl->Semantic.Index;
|
si = decl->Semantic.Index;
|
||||||
}
|
}
|
||||||
tgsi_dump_declaration(decl);
|
|
||||||
|
|
||||||
switch (decl->Declaration.File) {
|
switch (decl->Declaration.File) {
|
||||||
case TGSI_FILE_INPUT:
|
case TGSI_FILE_INPUT:
|
||||||
|
|
@ -492,6 +491,10 @@ nv50_prog_scan(struct nv50_translation_info *ti)
|
||||||
|
|
||||||
tgsi_scan_shader(p->pipe.tokens, &ti->scan);
|
tgsi_scan_shader(p->pipe.tokens, &ti->scan);
|
||||||
|
|
||||||
|
#ifdef NV50_PROGRAM_DEBUG
|
||||||
|
tgsi_dump(p->pipe.tokens, 0);
|
||||||
|
#endif
|
||||||
|
|
||||||
tgsi_parse_init(&parse, p->pipe.tokens);
|
tgsi_parse_init(&parse, p->pipe.tokens);
|
||||||
while (!tgsi_parse_end_of_tokens(&parse)) {
|
while (!tgsi_parse_end_of_tokens(&parse)) {
|
||||||
tgsi_parse_token(&parse);
|
tgsi_parse_token(&parse);
|
||||||
|
|
|
||||||
|
|
@ -20,6 +20,8 @@
|
||||||
* SOFTWARE.
|
* SOFTWARE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/* #define NV50_TGSI2NC_DEBUG */
|
||||||
|
|
||||||
/* XXX: need to clean this up so we get the typecasting right more naturally */
|
/* XXX: need to clean this up so we get the typecasting right more naturally */
|
||||||
|
|
||||||
#include <unistd.h>
|
#include <unistd.h>
|
||||||
|
|
@ -1015,10 +1017,8 @@ emit_fetch(struct bld_context *bld, const struct tgsi_full_instruction *insn,
|
||||||
abort();
|
abort();
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if (!res) {
|
if (!res)
|
||||||
debug_printf("WARNING: undefined source value in TGSI instruction\n");
|
return bld_undef(bld, NV_FILE_GPR);
|
||||||
return bld_load_imm_u32(bld, 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
switch (tgsi_util_get_full_src_register_sign_mode(src, chan)) {
|
switch (tgsi_util_get_full_src_register_sign_mode(src, chan)) {
|
||||||
case TGSI_UTIL_SIGN_KEEP:
|
case TGSI_UTIL_SIGN_KEEP:
|
||||||
|
|
@ -1234,7 +1234,9 @@ bld_instruction(struct bld_context *bld,
|
||||||
int c;
|
int c;
|
||||||
uint opcode = translate_opcode(insn->Instruction.Opcode);
|
uint opcode = translate_opcode(insn->Instruction.Opcode);
|
||||||
|
|
||||||
tgsi_dump_instruction(insn, 1);
|
#ifdef NV50_TGSI2NC_DEBUG
|
||||||
|
debug_printf("bld_instruction:"); tgsi_dump_instruction(insn, 1);
|
||||||
|
#endif
|
||||||
|
|
||||||
switch (insn->Instruction.Opcode) {
|
switch (insn->Instruction.Opcode) {
|
||||||
case TGSI_OPCODE_ADD:
|
case TGSI_OPCODE_ADD:
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue