From d8ffce96d2b7e2fbbd60e50f7c374a5eb50e20e0 Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Thu, 13 Feb 2025 17:20:43 -0800 Subject: [PATCH] brw: increase brw_reg::subnr size to 6 bits Since Xe2, the registers are bigger and even the instruction structures got updated to have 6 bits. The way I detected this issue was when I tried to use src/intel/executor to add the following instruction: add(8) g6.8<1>UD g4<8,8,1>UD 0x00000008UD { align1 WE_all 1Q I@1 }; Executor would read this and end up emitting an add with dst being g6<1>UD instead of what we wanted. It turns out that inside brw_gram.y, at dstoperand and dstoperandex we do: $$.subnr = $$.subnr * brw_type_size_bytes($4); which would overflow subnr back to 0. The overflow doesn't seem to be a problem with code we emit directly (unlike the code we parse, like above) due to the fact that we seem to treat Xe2 registers as smaller all the way until we call phys_nr() and phys_subnr() during code generation. The phys_subnr() function can generate a value that would overflow reg.subnr, but this value is never written back to reg.subnr, it's just returned as an unsigned int. Fixes: e9f63df2f2c0 ("intel/dev: Enable LNL PCI IDs without INTEL_FORCE_PROBE") Reviewed-by: Caio Oliveira Signed-off-by: Paulo Zanoni Part-of: (cherry picked from commit 927d7b322b2252d9cc84f49a8ec7897a399b806e) --- .pick_status.json | 2 +- src/intel/compiler/brw_reg.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 03e7e4cac50..b3719204ff6 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -74,7 +74,7 @@ "description": "brw: increase brw_reg::subnr size to 6 bits", "nominated": true, "nomination_type": 2, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "e9f63df2f2c0dafe0997dd69b60b7da99b5d91f4", "notes": null diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h index 9528e6c3b15..1c63f5c1623 100644 --- a/src/intel/compiler/brw_reg.h +++ b/src/intel/compiler/brw_reg.h @@ -162,8 +162,8 @@ typedef struct brw_reg { unsigned negate:1; /* source only */ unsigned abs:1; /* source only */ unsigned address_mode:1; /* relative addressing, hopefully! */ - unsigned pad0:16; - unsigned subnr:5; /* :1 in align16 */ + unsigned pad0:15; + unsigned subnr:6; /* :1 in align16 */ }; uint32_t bits; };