From d8b525466ca4d51a75d460f84697dd497d7c5a43 Mon Sep 17 00:00:00 2001 From: Emma Anholt Date: Wed, 29 Apr 2026 16:58:23 -0700 Subject: [PATCH] ir3: Fix shared IMAD24 lowering. Caught by dEQP-VK.spirv_assembly.instruction.compute.opsdotkhr.all_us_v2i16_out32 and friends in !41178 Fixes: b4874aa5cf5 ("ir3: Use scalar ALU instructions when possible") Part-of: --- src/freedreno/ir3/ir3_compiler_nir.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 38d9db43782..8c3cf4d2610 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -870,7 +870,7 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu) case nir_op_imad24_ir3: if (use_shared) { dst = ir3_ADD_U_rpt(b, dst_sz, - ir3_MUL_U24_rpt(b, dst_sz, src[0], 0, src[1], 0), + ir3_MUL_S24_rpt(b, dst_sz, src[0], 0, src[1], 0), 0, src[2], 0); } else { dst = ir3_MAD_S24_rpt(b, dst_sz, src[0], 0, src[1], 0, src[2], 0);