From d8493e53100f18732707e1994823dae6fcc35b8c Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Sat, 4 Jun 2022 20:04:13 +0200 Subject: [PATCH] radv, aco: Lower txf offset in NIR. Foz-DB Navi21: Totals from 384 (0.28% of 134913) affected shaders: VGPRs: 29736 -> 29536 (-0.67%) CodeSize: 2455796 -> 2452652 (-0.13%); split: -0.13%, +0.01% MaxWaves: 6350 -> 6358 (+0.13%) Instrs: 457743 -> 456273 (-0.32%); split: -0.33%, +0.01% Latency: 6680266 -> 6730612 (+0.75%); split: -0.03%, +0.78% InvThroughput: 1562936 -> 1599375 (+2.33%); split: -0.05%, +2.38% VClause: 9258 -> 9291 (+0.36%); split: -0.14%, +0.50% SClause: 15713 -> 15707 (-0.04%); split: -0.08%, +0.04% Copies: 26878 -> 27021 (+0.53%); split: -0.03%, +0.56% PreVGPRs: 27259 -> 27230 (-0.11%); split: -0.11%, +0.01% Signed-off-by: Georg Lehmann Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/compiler/aco_instruction_selection.cpp | 12 +++--------- src/amd/vulkan/radv_shader.c | 1 + 2 files changed, 4 insertions(+), 9 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 59c87a262cc..275c1008f2b 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -9347,7 +9347,9 @@ visit_tex(isel_context* ctx, nir_tex_instr* instr) return; } - if (has_offset && instr->op != nir_texop_txf) { + if (has_offset) { + assert(instr->op != nir_texop_txf); + aco_ptr tmp_instr; Temp acc, pack = Temp(); @@ -9454,14 +9456,6 @@ visit_tex(isel_context* ctx, nir_tex_instr* instr) bool da = should_declare_array(ctx, instr->sampler_dim, instr->is_array); - if (has_offset && instr->op == nir_texop_txf) { - for (unsigned i = 0; i < std::min(offset.size(), instr->coord_components); i++) { - Temp off = emit_extract_vector(ctx, offset, i, v1); - coords[i] = bld.vadd32(bld.def(v1), coords[i], off); - } - has_offset = false; - } - /* Build tex instruction */ unsigned dmask = nir_ssa_def_components_read(&instr->dest.ssa) & 0xf; if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index ec5c00f0b1d..21174c2ed10 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -820,6 +820,7 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_pipeline_ static const nir_lower_tex_options tex_options = { .lower_txp = ~0, + .lower_txf_offset = true, .lower_tg4_offsets = true, .lower_txs_cube_array = true, .lower_to_fragment_fetch_amd = true,