diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp
index 59dcd5273cf..59cc6c11749 100644
--- a/src/amd/compiler/aco_register_allocation.cpp
+++ b/src/amd/compiler/aco_register_allocation.cpp
@@ -1804,6 +1804,16 @@ get_reg(ra_ctx& ctx, const RegisterFile& reg_file, Temp temp,
          return *res;
    }
 
+   if (temp.size() == 1 && operand_index == -1) {
+      for (const Operand& op : instr->operands) {
+         if (op.isTemp() && op.isFirstKillBeforeDef() && op.regClass() == temp.regClass()) {
+            assert(op.isFixed());
+            if (get_reg_specified(ctx, reg_file, temp.regClass(), instr, op.physReg()))
+               return op.physReg();
+         }
+      }
+   }
+
    DefInfo info(ctx, instr, temp.regClass(), operand_index);
 
    if (!ctx.policy.skip_optimistic_path) {
diff --git a/src/amd/compiler/tests/test_d3d11_derivs.cpp b/src/amd/compiler/tests/test_d3d11_derivs.cpp
index 9130a6918c0..d12cd5fe55b 100644
--- a/src/amd/compiler/tests/test_d3d11_derivs.cpp
+++ b/src/amd/compiler/tests/test_d3d11_derivs.cpp
@@ -429,8 +429,7 @@ BEGIN_TEST(d3d11_derivs.cube)
    //>> v_mov_b32_e32 v#rf, v#rf_tmp                                                         ; $_
    //>> v_fmaak_f32 v#rx_tmp, v#_, v#_, 0x3fc00000                                           ; $_ $_
    //>> v_fmaak_f32 v#ry_tmp, v#_, v#_, 0x3fc00000                                           ; $_ $_
-   //>> v_mov_b32_e32 v#ry, v#ry_tmp                                                         ; $_
-   //>> v_mov_b32_e32 v#rx, v#rx_tmp                                                         ; $_
+   //>> v_lshrrev_b64 v[#rx:#ry], 0, v[#rx_tmp:#ry_tmp]                                      ; $_ $_
    //; success = rx+1 == ry and rx+2 == rf
    //>> image_sample v[#_:#_], v[#rx:#rf], s[#_:#_], s[#_:#_] dmask:0xf dim:SQ_RSRC_IMG_CUBE ; $_ $_
    pbld.print_ir(VK_SHADER_STAGE_FRAGMENT_BIT, "Assembly");
@@ -477,9 +476,8 @@ BEGIN_TEST(d3d11_derivs.cube_array)
 
    //>> v_fmaak_f32 v#rx_tmp, v#_, v#_, 0x3fc00000                                            ; $_ $_
    //>> v_fmaak_f32 v#ry_tmp, v#_, v#_, 0x3fc00000                                            ; $_ $_
-   //>> v_mov_b32_e32 v#ry, v#ry_tmp                                                          ; $_
    //>> v_fmamk_f32 v#rlf_tmp, v#rl, 0x41000000, v#rf                                         ; $_ $_
-   //>> v_mov_b32_e32 v#rx, v#rx_tmp                                                          ; $_
+   //>> v_lshrrev_b64 v[#rx:#ry], 0, v[#rx_tmp:#ry_tmp]                                       ; $_ $_
    //>> v_mov_b32_e32 v#rlf, v#rlf_tmp                                                        ; $_
 
    //>> BB1:
diff --git a/src/amd/compiler/tests/test_isel.cpp b/src/amd/compiler/tests/test_isel.cpp
index 2674b4f322a..0b34dc65a68 100644
--- a/src/amd/compiler/tests/test_isel.cpp
+++ b/src/amd/compiler/tests/test_isel.cpp
@@ -171,7 +171,7 @@ BEGIN_TEST(isel.discard_early_exit.mrtz)
    );
 
    /* On GFX11, the discard early exit must use mrtz if the shader exports only depth. */
-   //>> exp mrtz v0, off, off, off done     ; $_ $_
+   //>> exp mrtz v#_, off, off, off done    ; $_ $_
    //! s_nop 0                              ; $_
    //! s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) ; $_
    //! s_endpgm                             ; $_
@@ -199,7 +199,7 @@ BEGIN_TEST(isel.discard_early_exit.mrt0)
    );
 
    /* On GFX11, the discard early exit must use mrt0 if the shader exports color. */
-   //>> exp mrt0 v0, v0, v0, v0 done        ; $_ $_
+   //>> exp mrt0 v#x, v#x, v#x, v#x done    ; $_ $_
    //! s_nop 0                              ; $_
    //! s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) ; $_
    //! s_endpgm                             ; $_