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radeonsi: don't make a copy of pipe_index_buffer in draw_vbo

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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
This commit is contained in:
Marek Olšák 2017-03-28 22:19:29 +02:00
parent abb25fb18e
commit d76c306162
1 changed files with 27 additions and 32 deletions
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59
src/gallium/drivers/radeonsi/si_state_draw.c
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@ -1089,7 +1089,8 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
{ {
struct si_context *sctx = (struct si_context *)ctx; struct si_context *sctx = (struct si_context *)ctx;
struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
struct pipe_index_buffer ib = {}; const struct pipe_index_buffer *ib = &sctx->index_buffer;
struct pipe_index_buffer ib_tmp; /* for index buffer uploads only */
unsigned mask, dirty_tex_counter, rast_prim; unsigned mask, dirty_tex_counter, rast_prim;
if (likely(!info->indirect)) { if (likely(!info->indirect)) {
@ -1174,18 +1175,13 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
if (!si_upload_graphics_shader_descriptors(sctx)) if (!si_upload_graphics_shader_descriptors(sctx))
return; return;
if (info->indexed) { ib_tmp.buffer = NULL;
/* Initialize the index buffer struct. */
pipe_resource_reference(&ib.buffer, sctx->index_buffer.buffer);
ib.user_buffer = sctx->index_buffer.user_buffer;
ib.index_size = sctx->index_buffer.index_size;
ib.offset = sctx->index_buffer.offset;
if (info->indexed) {
/* Translate or upload, if needed. */ /* Translate or upload, if needed. */
/* 8-bit indices are supported on VI. */ /* 8-bit indices are supported on VI. */
if (sctx->b.chip_class <= CIK && ib.index_size == 1) { if (sctx->b.chip_class <= CIK && ib->index_size == 1) {
struct pipe_resource *out_buffer = NULL; unsigned start, count, start_offset, size;
unsigned out_offset, start, count, start_offset, size;
void *ptr; void *ptr;
si_get_draw_start_count(sctx, info, &start, &count); si_get_draw_start_count(sctx, info, &start, &count);
@ -1195,43 +1191,42 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
u_upload_alloc(ctx->stream_uploader, start_offset, u_upload_alloc(ctx->stream_uploader, start_offset,
size, size,
si_optimal_tcc_alignment(sctx, size), si_optimal_tcc_alignment(sctx, size),
&out_offset, &out_buffer, &ptr); &ib_tmp.offset, &ib_tmp.buffer, &ptr);
if (!out_buffer) { if (!ib_tmp.buffer)
pipe_resource_reference(&ib.buffer, NULL);
return; return;
}
util_shorten_ubyte_elts_to_userptr(&sctx->b.b, &ib, 0, 0, util_shorten_ubyte_elts_to_userptr(&sctx->b.b, ib, 0, 0,
ib.offset + start, ib->offset + start,
count, ptr); count, ptr);
pipe_resource_reference(&ib.buffer, NULL);
ib.user_buffer = NULL;
ib.buffer = out_buffer;
/* info->start will be added by the drawing code */ /* info->start will be added by the drawing code */
ib.offset = out_offset - start_offset; ib_tmp.offset -= start_offset;
ib.index_size = 2; ib_tmp.index_size = 2;
} else if (ib.user_buffer && !ib.buffer) { ib = &ib_tmp;
} else if (ib->user_buffer && !ib->buffer) {
unsigned start, count, start_offset; unsigned start, count, start_offset;
si_get_draw_start_count(sctx, info, &start, &count); si_get_draw_start_count(sctx, info, &start, &count);
start_offset = start * ib.index_size; start_offset = start * ib->index_size;
u_upload_data(ctx->stream_uploader, start_offset, u_upload_data(ctx->stream_uploader, start_offset,
count * ib.index_size, count * ib->index_size,
sctx->screen->b.info.tcc_cache_line_size, sctx->screen->b.info.tcc_cache_line_size,
(char*)ib.user_buffer + start_offset, (char*)ib->user_buffer + start_offset,
&ib.offset, &ib.buffer); &ib_tmp.offset, &ib_tmp.buffer);
if (!ib.buffer) if (!ib_tmp.buffer)
return; return;
/* info->start will be added by the drawing code */ /* info->start will be added by the drawing code */
ib.offset -= start_offset; ib_tmp.offset -= start_offset;
ib_tmp.index_size = ib->index_size;
ib = &ib_tmp;
} else if (sctx->b.chip_class <= CIK && } else if (sctx->b.chip_class <= CIK &&
r600_resource(ib.buffer)->TC_L2_dirty) { r600_resource(ib->buffer)->TC_L2_dirty) {
/* VI reads index buffers through TC L2, so it doesn't /* VI reads index buffers through TC L2, so it doesn't
* need this. */ * need this. */
sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2; sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
r600_resource(ib.buffer)->TC_L2_dirty = false; r600_resource(ib->buffer)->TC_L2_dirty = false;
} }
} }
@ -1297,7 +1292,7 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
si_emit_draw_registers(sctx, info); si_emit_draw_registers(sctx, info);
si_ce_pre_draw_synchronization(sctx); si_ce_pre_draw_synchronization(sctx);
si_emit_draw_packets(sctx, info, &ib); si_emit_draw_packets(sctx, info, ib);
si_ce_post_draw_synchronization(sctx); si_ce_post_draw_synchronization(sctx);
if (sctx->trace_buf) if (sctx->trace_buf)
@ -1343,7 +1338,7 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
sctx->framebuffer.do_update_surf_dirtiness = false; sctx->framebuffer.do_update_surf_dirtiness = false;
} }
pipe_resource_reference(&ib.buffer, NULL); pipe_resource_reference(&ib_tmp.buffer, NULL);
sctx->b.num_draw_calls++; sctx->b.num_draw_calls++;
if (G_0286E8_WAVESIZE(sctx->spi_tmpring_size)) if (G_0286E8_WAVESIZE(sctx->spi_tmpring_size))
sctx->b.num_spill_draw_calls++; sctx->b.num_spill_draw_calls++;