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radv: stop waiting for DMA to be idle for all transfer operations

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Only copy operations actually use CP DMA.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15194>
This commit is contained in:
Samuel Pitoiset 2022-02-28 15:50:34 +01:00 • committed by Marge Bot
parent 1b354ab913
commit d7514c5f04
1 changed files with 3 additions and 10 deletions
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13
src/amd/vulkan/radv_cmd_buffer.c
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@ -8446,18 +8446,11 @@ radv_barrier(struct radv_cmd_buffer *cmd_buffer, const VkDependencyInfoKHR *dep_
&dep_info->pImageMemoryBarriers[i].subresourceRange, sample_locs_info ? &sample_locations : NULL);
}
/* Make sure CP DMA is idle because the driver might have performed a
* DMA operation for copying or filling buffers/images.
/* Make sure CP DMA is idle because the driver might have performed a DMA operation for copying a
* buffer (or a MSAA image using FMASK) or updated a buffer which is a transfer operation.
*/
if (src_stage_mask & (VK_PIPELINE_STAGE_2_COPY_BIT_KHR |
VK_PIPELINE_STAGE_2_RESOLVE_BIT_KHR |
VK_PIPELINE_STAGE_2_BLIT_BIT_KHR |
VK_PIPELINE_STAGE_2_CLEAR_BIT_KHR)) {
/* Be conservative for now. */
src_stage_mask |= VK_PIPELINE_STAGE_2_TRANSFER_BIT_KHR;
}
if (src_stage_mask & (VK_PIPELINE_STAGE_2_TRANSFER_BIT_KHR |
VK_PIPELINE_STAGE_2_TRANSFER_BIT_KHR |
VK_PIPELINE_STAGE_2_BOTTOM_OF_PIPE_BIT_KHR))
si_cp_dma_wait_for_idle(cmd_buffer);