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freedreno: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Rob Clark
parent
5041ea96a0
commit
d74029bddc
6 changed files with 135 additions and 16 deletions
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@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from are:
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- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 37162 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13324 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 32453 bytes, from 2017-11-10 18:31:55)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 33379 bytes, from 2017-11-14 19:02:59)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 111898 bytes, from 2017-06-06 18:23:59)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 143114 bytes, from 2017-11-10 18:31:55)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 143413 bytes, from 2017-11-14 19:05:14)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2017-05-17 13:21:27)
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Copyright (C) 2013-2017 by the following authors:
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@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from are:
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- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 37162 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13324 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 32453 bytes, from 2017-11-10 18:31:55)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 33379 bytes, from 2017-11-14 19:02:59)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 111898 bytes, from 2017-06-06 18:23:59)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 143114 bytes, from 2017-11-10 18:31:55)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 143413 bytes, from 2017-11-14 19:05:14)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2017-05-17 13:21:27)
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Copyright (C) 2013-2017 by the following authors:
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@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from are:
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- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 37162 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13324 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 32453 bytes, from 2017-11-10 18:31:55)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 33379 bytes, from 2017-11-14 19:02:59)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 111898 bytes, from 2017-06-06 18:23:59)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 143114 bytes, from 2017-11-10 18:31:55)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 143413 bytes, from 2017-11-14 19:05:14)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2017-05-17 13:21:27)
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Copyright (C) 2013-2017 by the following authors:
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@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from are:
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- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 37162 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13324 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 32453 bytes, from 2017-11-10 18:31:55)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 33379 bytes, from 2017-11-14 19:02:59)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 111898 bytes, from 2017-06-06 18:23:59)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 143114 bytes, from 2017-11-10 18:31:55)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 143413 bytes, from 2017-11-14 19:05:14)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2017-05-17 13:21:27)
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Copyright (C) 2013-2017 by the following authors:
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@ -4960,12 +4960,11 @@ static inline uint32_t A5XX_SSBO_1_1_DEPTH(uint32_t val)
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}
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#define REG_A5XX_SSBO_2_0 0x00000000
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#define A5XX_SSBO_2_0_BASE_LO__MASK 0xffffffe0
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#define A5XX_SSBO_2_0_BASE_LO__SHIFT 5
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#define A5XX_SSBO_2_0_BASE_LO__MASK 0xffffffff
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#define A5XX_SSBO_2_0_BASE_LO__SHIFT 0
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static inline uint32_t A5XX_SSBO_2_0_BASE_LO(uint32_t val)
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{
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assert(!(val & 0x1f));
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return ((val >> 5) << A5XX_SSBO_2_0_BASE_LO__SHIFT) & A5XX_SSBO_2_0_BASE_LO__MASK;
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return ((val) << A5XX_SSBO_2_0_BASE_LO__SHIFT) & A5XX_SSBO_2_0_BASE_LO__MASK;
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}
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#define REG_A5XX_SSBO_2_1 0x00000001
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@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from are:
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- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 37162 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13324 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 32453 bytes, from 2017-11-10 18:31:55)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 33379 bytes, from 2017-11-14 19:02:59)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 111898 bytes, from 2017-06-06 18:23:59)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 143114 bytes, from 2017-11-10 18:31:55)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 143413 bytes, from 2017-11-14 19:05:14)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2017-05-17 13:21:27)
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Copyright (C) 2013-2017 by the following authors:
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@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from are:
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- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 37162 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13324 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 32453 bytes, from 2017-11-10 18:31:55)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 33379 bytes, from 2017-11-14 19:02:59)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2017-05-17 13:21:27)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 111898 bytes, from 2017-06-06 18:23:59)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 143114 bytes, from 2017-11-10 18:31:55)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 143413 bytes, from 2017-11-14 19:05:14)
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- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2017-05-17 13:21:27)
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Copyright (C) 2013-2017 by the following authors:
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@ -583,6 +583,126 @@ static inline uint32_t CP_DRAW_INDX_OFFSET_5_INDX_SIZE(uint32_t val)
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return ((val) << CP_DRAW_INDX_OFFSET_5_INDX_SIZE__SHIFT) & CP_DRAW_INDX_OFFSET_5_INDX_SIZE__MASK;
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}
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#define REG_CP_DRAW_INDIRECT_0 0x00000000
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#define CP_DRAW_INDIRECT_0_PRIM_TYPE__MASK 0x0000003f
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#define CP_DRAW_INDIRECT_0_PRIM_TYPE__SHIFT 0
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static inline uint32_t CP_DRAW_INDIRECT_0_PRIM_TYPE(enum pc_di_primtype val)
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{
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return ((val) << CP_DRAW_INDIRECT_0_PRIM_TYPE__SHIFT) & CP_DRAW_INDIRECT_0_PRIM_TYPE__MASK;
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}
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#define CP_DRAW_INDIRECT_0_SOURCE_SELECT__MASK 0x000000c0
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#define CP_DRAW_INDIRECT_0_SOURCE_SELECT__SHIFT 6
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static inline uint32_t CP_DRAW_INDIRECT_0_SOURCE_SELECT(enum pc_di_src_sel val)
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{
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return ((val) << CP_DRAW_INDIRECT_0_SOURCE_SELECT__SHIFT) & CP_DRAW_INDIRECT_0_SOURCE_SELECT__MASK;
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}
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#define CP_DRAW_INDIRECT_0_VIS_CULL__MASK 0x00000300
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#define CP_DRAW_INDIRECT_0_VIS_CULL__SHIFT 8
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static inline uint32_t CP_DRAW_INDIRECT_0_VIS_CULL(enum pc_di_vis_cull_mode val)
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{
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return ((val) << CP_DRAW_INDIRECT_0_VIS_CULL__SHIFT) & CP_DRAW_INDIRECT_0_VIS_CULL__MASK;
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}
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#define CP_DRAW_INDIRECT_0_INDEX_SIZE__MASK 0x00000c00
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#define CP_DRAW_INDIRECT_0_INDEX_SIZE__SHIFT 10
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static inline uint32_t CP_DRAW_INDIRECT_0_INDEX_SIZE(enum a4xx_index_size val)
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{
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return ((val) << CP_DRAW_INDIRECT_0_INDEX_SIZE__SHIFT) & CP_DRAW_INDIRECT_0_INDEX_SIZE__MASK;
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}
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#define CP_DRAW_INDIRECT_0_TESS_MODE__MASK 0x01f00000
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#define CP_DRAW_INDIRECT_0_TESS_MODE__SHIFT 20
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static inline uint32_t CP_DRAW_INDIRECT_0_TESS_MODE(uint32_t val)
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{
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return ((val) << CP_DRAW_INDIRECT_0_TESS_MODE__SHIFT) & CP_DRAW_INDIRECT_0_TESS_MODE__MASK;
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}
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#define REG_CP_DRAW_INDIRECT_1 0x00000001
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#define CP_DRAW_INDIRECT_1_INDIRECT_LO__MASK 0xffffffff
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#define CP_DRAW_INDIRECT_1_INDIRECT_LO__SHIFT 0
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static inline uint32_t CP_DRAW_INDIRECT_1_INDIRECT_LO(uint32_t val)
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{
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return ((val) << CP_DRAW_INDIRECT_1_INDIRECT_LO__SHIFT) & CP_DRAW_INDIRECT_1_INDIRECT_LO__MASK;
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}
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#define REG_CP_DRAW_INDIRECT_2 0x00000002
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#define CP_DRAW_INDIRECT_2_INDIRECT_HI__MASK 0xffffffff
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#define CP_DRAW_INDIRECT_2_INDIRECT_HI__SHIFT 0
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static inline uint32_t CP_DRAW_INDIRECT_2_INDIRECT_HI(uint32_t val)
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{
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return ((val) << CP_DRAW_INDIRECT_2_INDIRECT_HI__SHIFT) & CP_DRAW_INDIRECT_2_INDIRECT_HI__MASK;
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}
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#define REG_CP_DRAW_INDX_INDIRECT_0 0x00000000
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#define CP_DRAW_INDX_INDIRECT_0_PRIM_TYPE__MASK 0x0000003f
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#define CP_DRAW_INDX_INDIRECT_0_PRIM_TYPE__SHIFT 0
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static inline uint32_t CP_DRAW_INDX_INDIRECT_0_PRIM_TYPE(enum pc_di_primtype val)
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{
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return ((val) << CP_DRAW_INDX_INDIRECT_0_PRIM_TYPE__SHIFT) & CP_DRAW_INDX_INDIRECT_0_PRIM_TYPE__MASK;
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}
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#define CP_DRAW_INDX_INDIRECT_0_SOURCE_SELECT__MASK 0x000000c0
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#define CP_DRAW_INDX_INDIRECT_0_SOURCE_SELECT__SHIFT 6
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static inline uint32_t CP_DRAW_INDX_INDIRECT_0_SOURCE_SELECT(enum pc_di_src_sel val)
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{
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return ((val) << CP_DRAW_INDX_INDIRECT_0_SOURCE_SELECT__SHIFT) & CP_DRAW_INDX_INDIRECT_0_SOURCE_SELECT__MASK;
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}
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#define CP_DRAW_INDX_INDIRECT_0_VIS_CULL__MASK 0x00000300
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#define CP_DRAW_INDX_INDIRECT_0_VIS_CULL__SHIFT 8
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static inline uint32_t CP_DRAW_INDX_INDIRECT_0_VIS_CULL(enum pc_di_vis_cull_mode val)
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{
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return ((val) << CP_DRAW_INDX_INDIRECT_0_VIS_CULL__SHIFT) & CP_DRAW_INDX_INDIRECT_0_VIS_CULL__MASK;
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}
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#define CP_DRAW_INDX_INDIRECT_0_INDEX_SIZE__MASK 0x00000c00
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#define CP_DRAW_INDX_INDIRECT_0_INDEX_SIZE__SHIFT 10
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static inline uint32_t CP_DRAW_INDX_INDIRECT_0_INDEX_SIZE(enum a4xx_index_size val)
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{
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return ((val) << CP_DRAW_INDX_INDIRECT_0_INDEX_SIZE__SHIFT) & CP_DRAW_INDX_INDIRECT_0_INDEX_SIZE__MASK;
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}
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#define CP_DRAW_INDX_INDIRECT_0_TESS_MODE__MASK 0x01f00000
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#define CP_DRAW_INDX_INDIRECT_0_TESS_MODE__SHIFT 20
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static inline uint32_t CP_DRAW_INDX_INDIRECT_0_TESS_MODE(uint32_t val)
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{
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return ((val) << CP_DRAW_INDX_INDIRECT_0_TESS_MODE__SHIFT) & CP_DRAW_INDX_INDIRECT_0_TESS_MODE__MASK;
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}
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#define REG_CP_DRAW_INDX_INDIRECT_1 0x00000001
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#define CP_DRAW_INDX_INDIRECT_1_INDX_BASE_LO__MASK 0xffffffff
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#define CP_DRAW_INDX_INDIRECT_1_INDX_BASE_LO__SHIFT 0
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static inline uint32_t CP_DRAW_INDX_INDIRECT_1_INDX_BASE_LO(uint32_t val)
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{
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return ((val) << CP_DRAW_INDX_INDIRECT_1_INDX_BASE_LO__SHIFT) & CP_DRAW_INDX_INDIRECT_1_INDX_BASE_LO__MASK;
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}
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#define REG_CP_DRAW_INDX_INDIRECT_2 0x00000002
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#define CP_DRAW_INDX_INDIRECT_2_INDX_BASE_HI__MASK 0xffffffff
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#define CP_DRAW_INDX_INDIRECT_2_INDX_BASE_HI__SHIFT 0
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static inline uint32_t CP_DRAW_INDX_INDIRECT_2_INDX_BASE_HI(uint32_t val)
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{
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return ((val) << CP_DRAW_INDX_INDIRECT_2_INDX_BASE_HI__SHIFT) & CP_DRAW_INDX_INDIRECT_2_INDX_BASE_HI__MASK;
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}
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#define REG_CP_DRAW_INDX_INDIRECT_3 0x00000003
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#define CP_DRAW_INDX_INDIRECT_3_MAX_INDICES__MASK 0xffffffff
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#define CP_DRAW_INDX_INDIRECT_3_MAX_INDICES__SHIFT 0
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static inline uint32_t CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(uint32_t val)
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{
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return ((val) << CP_DRAW_INDX_INDIRECT_3_MAX_INDICES__SHIFT) & CP_DRAW_INDX_INDIRECT_3_MAX_INDICES__MASK;
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}
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#define REG_CP_DRAW_INDX_INDIRECT_4 0x00000004
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#define CP_DRAW_INDX_INDIRECT_4_INDIRECT_LO__MASK 0xffffffff
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#define CP_DRAW_INDX_INDIRECT_4_INDIRECT_LO__SHIFT 0
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static inline uint32_t CP_DRAW_INDX_INDIRECT_4_INDIRECT_LO(uint32_t val)
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{
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return ((val) << CP_DRAW_INDX_INDIRECT_4_INDIRECT_LO__SHIFT) & CP_DRAW_INDX_INDIRECT_4_INDIRECT_LO__MASK;
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}
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#define REG_CP_DRAW_INDX_INDIRECT_5 0x00000005
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#define CP_DRAW_INDX_INDIRECT_5_INDIRECT_HI__MASK 0xffffffff
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#define CP_DRAW_INDX_INDIRECT_5_INDIRECT_HI__SHIFT 0
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static inline uint32_t CP_DRAW_INDX_INDIRECT_5_INDIRECT_HI(uint32_t val)
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{
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return ((val) << CP_DRAW_INDX_INDIRECT_5_INDIRECT_HI__SHIFT) & CP_DRAW_INDX_INDIRECT_5_INDIRECT_HI__MASK;
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}
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static inline uint32_t REG_CP_SET_DRAW_STATE_(uint32_t i0) { return 0x00000000 + 0x3*i0; }
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static inline uint32_t REG_CP_SET_DRAW_STATE__0(uint32_t i0) { return 0x00000000 + 0x3*i0; }
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