iris: Enable HiZ for non-8x4 aligned miplevels on Icelake and later

8x4 alignment was absolutely required prior to Gfx8, and while some
things were relaxed on Gfx8-9, Nanley's experiments in issue #3788
indicated that there were still issues on those platforms.

It appears that the restrictions were relaxed on Icelake and
non-8x4 aligned HiZ "should" work on Gfx11+.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4674>
This commit is contained in:
Kenneth Graunke 2022-08-15 18:13:41 -07:00 committed by Marge Bot
parent fe0152e216
commit d70b76ea71

View file

@ -644,8 +644,11 @@ iris_resource_level_has_hiz(const struct intel_device_info *devinfo,
/* Disable HiZ for LOD > 0 unless the width/height are 8x4 aligned.
* For LOD == 0, we can grow the dimensions to make it work.
*
* This doesn't appear to be necessary on Gfx11+. See details here:
* https://gitlab.freedesktop.org/mesa/mesa/-/issues/3788
*/
if (level > 0) {
if (devinfo->ver < 11 && level > 0) {
if (u_minify(res->base.b.width0, level) & 7)
return false;