From d6f9c197551f60ebe77f5e2c4477cb1509487047 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 24 Jan 2025 07:30:01 -0800 Subject: [PATCH] radv/amdgpu: add support for AMDGPU_GEM_CREATE_GFX12_DCC This flags will be used to set PTE.DCC to VRAM allocations (ie. compression). Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_radeon_winsys.h | 2 ++ src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c | 8 ++++++++ 2 files changed, 10 insertions(+) diff --git a/src/amd/vulkan/radv_radeon_winsys.h b/src/amd/vulkan/radv_radeon_winsys.h index ab15ddc90d8..a4ae3cf5cef 100644 --- a/src/amd/vulkan/radv_radeon_winsys.h +++ b/src/amd/vulkan/radv_radeon_winsys.h @@ -49,6 +49,7 @@ enum radeon_bo_flag { /* bitfield */ RADEON_FLAG_ZERO_VRAM = (1 << 10), RADEON_FLAG_REPLAYABLE = (1 << 11), RADEON_FLAG_DISCARDABLE = (1 << 12), + RADEON_FLAG_GFX12_ALLOW_DCC = (1 << 13), }; enum radeon_ctx_priority { @@ -173,6 +174,7 @@ struct radeon_winsys_bo { bool vram_no_cpu_access; /* buffer is added to the BO list of all submissions */ bool use_global_list; + bool gfx12_allow_dcc; enum radeon_bo_domain initial_domain; }; diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c index 2e1000cc4e6..634f1464f35 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c @@ -512,6 +512,12 @@ radv_amdgpu_winsys_bo_create(struct radeon_winsys *_ws, uint64_t size, unsigned if (flags & RADEON_FLAG_DISCARDABLE && ws->info.drm_minor >= 47) request.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; + if (flags & RADEON_FLAG_GFX12_ALLOW_DCC && ws->info.drm_minor >= 58) { + assert(ws->info.gfx_level >= GFX12 && (initial_domain & RADEON_DOMAIN_VRAM)); + bo->base.gfx12_allow_dcc = true; + request.flags |= AMDGPU_GEM_CREATE_GFX12_DCC; + } + r = ac_drm_bo_alloc(ws->dev, &request, &buf_handle); if (r) { fprintf(stderr, "radv/amdgpu: Failed to allocate a buffer:\n"); @@ -905,6 +911,8 @@ radv_amdgpu_bo_get_flags_from_fd(struct radeon_winsys *_ws, int fd, enum radeon_ *flags |= RADEON_FLAG_NO_INTERPROCESS_SHARING | RADEON_FLAG_PREFER_LOCAL_BO; if (info.alloc_flags & AMDGPU_GEM_CREATE_VRAM_CLEARED) *flags |= RADEON_FLAG_ZERO_VRAM; + if (info.alloc_flags & AMDGPU_GEM_CREATE_GFX12_DCC) + *flags |= RADEON_FLAG_GFX12_ALLOW_DCC; return true; }