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i965/icl: Define and use icl mocs settings

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Gen11 MOCS settings are duplicate of Gen10 MOCS settings.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Anuj Phogat 2017-05-10 10:49:04 -07:00
parent e9ad5c9a5d
commit d6b26649a6
3 changed files with 11 additions and 1 deletions
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6
src/mesa/drivers/dri/i965/brw_state.h
View file

@ -386,6 +386,12 @@ void gen11_init_atoms(struct brw_context *brw);
/* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
#define CNL_MOCS_PTE (1 << 1)
/* Ice Lake uses same MOCS settings as Cannonlake */
/* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
#define ICL_MOCS_WB (2 << 1)
/* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
#define ICL_MOCS_PTE (1 << 1)
uint32_t brw_get_bo_mocs(const struct gen_device_info *devinfo,
struct brw_bo *bo);

2
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
View file

@ -60,6 +60,7 @@ uint32_t wb_mocs[] = {
[8] = BDW_MOCS_WB,
[9] = SKL_MOCS_WB,
[10] = CNL_MOCS_WB,
[11] = ICL_MOCS_WB,
};
uint32_t pte_mocs[] = {
@ -67,6 +68,7 @@ uint32_t pte_mocs[] = {
[8] = BDW_MOCS_PTE,
[9] = SKL_MOCS_PTE,
[10] = CNL_MOCS_PTE,
[11] = ICL_MOCS_PTE,
};
uint32_t

4
src/mesa/drivers/dri/i965/genX_state_upload.c
View file

@ -334,7 +334,9 @@ genX(emit_vertex_buffer_state)(struct brw_context *brw,
#endif
#endif
#if GEN_GEN == 10
#if GEN_GEN == 11
.VertexBufferMOCS = ICL_MOCS_WB,
#elif GEN_GEN == 10
.VertexBufferMOCS = CNL_MOCS_WB,
#elif GEN_GEN == 9
.VertexBufferMOCS = SKL_MOCS_WB,