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freedreno/a3xx: disable early-z when we have kill's

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Signed-off-by: Rob Clark <robclark@freedesktop.org>
(cherry picked from commit 3fcb021201)
This commit is contained in:
Rob Clark 2014-10-18 16:52:44 -04:00 • committed by Emil Velikov
parent 5b76a32132
commit d6aab6b0c9
3 changed files with 10 additions and 0 deletions
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3
src/gallium/drivers/freedreno/a3xx/fd3_emit.c
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@ -458,6 +458,9 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
val |= A3XX_RB_DEPTH_CONTROL_FRAG_WRITES_Z;
val |= A3XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
}
if (fp->has_kill) {
val |= A3XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
}
OUT_PKT0(ring, REG_A3XX_RB_DEPTH_CONTROL, 1);
OUT_RING(ring, val);
}

4
src/gallium/drivers/freedreno/ir3/ir3_compiler.c
View file

@ -2047,6 +2047,8 @@ trans_kill(const struct instr_translater *t,
ir3_reg_create(instr, 0, IR3_REG_SSA)->instr = cond;
ctx->kill[ctx->kill_count++] = instr;
ctx->so->has_kill = true;
}
/*
@ -2081,6 +2083,8 @@ trans_killif(const struct instr_translater *t,
ctx->kill[ctx->kill_count++] = instr;
ctx->so->has_kill = true;
}
/*
* I2F / U2F / F2I / F2U

3
src/gallium/drivers/freedreno/ir3/ir3_shader.h
View file

@ -171,6 +171,9 @@ struct ir3_shader_variant {
/* do we have one or more texture sample instructions: */
bool has_samp;
/* do we have kill instructions: */
bool has_kill;
/* const reg # of first immediate, ie. 1 == c1
* (not regid, because TGSI thinks in terms of vec4 registers,
* not scalar registers)