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i965: Use ctx->Texture._MaxEnabledTexImageUnit for upper bound

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Avoid looping over 32/48/96 (!!) tex image units every draw, most of
which we don't care about.

Improves performance on everyone's favorite not-a-benchmark by 2.9% on
Haswell.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
This commit is contained in:
Chris Forbes 2014-04-13 12:37:32 +12:00
parent c4a98e76d7
commit d63026f62a
2 changed files with 4 additions and 2 deletions
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3
src/mesa/drivers/dri/i965/brw_draw.c
View file

@ -315,7 +315,8 @@ brw_predraw_resolve_buffers(struct brw_context *brw)
intel_renderbuffer_resolve_hiz(brw, depth_irb);
/* Resolve depth buffer and render cache of each enabled texture. */
for (int i = 0; i < ctx->Const.MaxCombinedTextureImageUnits; i++) {
int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
for (int i = 0; i <= maxEnabledUnit; i++) {
if (!ctx->Texture.Unit[i]._ReallyEnabled)
continue;
tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);

3
src/mesa/drivers/dri/i965/brw_tex.c
View file

@ -46,8 +46,9 @@ void brw_validate_textures( struct brw_context *brw )
{
struct gl_context *ctx = &brw->ctx;
int i;
int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
for (i = 0; i < ctx->Const.MaxCombinedTextureImageUnits; i++) {
for (i = 0; i <= maxEnabledUnit; i++) {
struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i];
if (texUnit->_ReallyEnabled) {