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radeonsi: account for outputs_written when updating spi_shader_col_format
Variants can modify which outputs get written so we must update
these fields otherwise spi_shader_col_format will be incorrect.
This can happen for instance with uniforms inlining:
uniform bool depth_only;
void main() {
if (depth_only) return;
...
}
When depth_only is true, this shader becomes empty after uniforms
inlining but spi_shader_col_format wasn't updated properly,
causing a hang.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14737
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 88986dcc9c)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40752>
This commit is contained in:
parent
a21f8ddf3d
commit
d5f9f12123
4 changed files with 19 additions and 6 deletions
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@ -3734,7 +3734,7 @@
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"description": "radeonsi: account for outputs_written when updating spi_shader_col_format",
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"nominated": true,
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"nomination_type": 1,
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"resolution": 0,
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"resolution": 1,
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"main_sha": null,
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"because_sha": null,
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"notes": null
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@ -2005,7 +2005,7 @@ bool si_create_shader_variant(struct si_screen *sscreen, struct ac_llvm_compiler
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shader->info.writes_sample_mask &= !shader->key.ps.part.epilog.kill_samplemask;
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shader->info.uses_discard |= shader->key.ps.part.prolog.poly_stipple ||
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shader->key.ps.part.epilog.alpha_func != PIPE_FUNC_ALWAYS;
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si_shader_update_spi_shader_formats(shader);
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si_shader_update_spi_shader_formats(shader, NULL);
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break;
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default:;
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}
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@ -159,6 +159,6 @@ void si_get_late_shader_variant_info(struct si_shader *shader, struct si_shader_
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nir_shader *nir);
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void si_set_spi_ps_input_config_for_separate_prolog(struct si_shader *shader);
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void si_fixup_spi_ps_input_config(struct si_shader *shader);
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void si_shader_update_spi_shader_formats(struct si_shader *shader);
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void si_shader_update_spi_shader_formats(struct si_shader *shader, nir_shader *nir);
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#endif
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@ -11,21 +11,34 @@
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/* The spi_shader_*_format fields depend on the framebuffer state and the
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* NIR shader (monolithic or main part).
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*/
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void si_shader_update_spi_shader_formats(struct si_shader *shader)
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void si_shader_update_spi_shader_formats(struct si_shader *shader, nir_shader *nir)
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{
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unsigned spi_shader_col_format = shader->key.ps.part.epilog.spi_shader_col_format;
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unsigned value = 0, num_mrts = 0;
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unsigned i, num_targets = (util_last_bit(spi_shader_col_format) + 3) / 4;
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uint64_t colors_written = UINT64_MAX;
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shader->info.spi_shader_z_format = ac_get_spi_shader_z_format(shader->info.writes_z, shader->info.writes_stencil,
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shader->info.writes_sample_mask,
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shader->key.ps.part.epilog.alpha_to_coverage_via_mrtz);
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if (nir) {
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colors_written = (nir->info.outputs_written >> FRAG_RESULT_DATA0) & BITFIELD_MASK(8);
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if (nir->info.outputs_written & BITFIELD_BIT(FRAG_RESULT_DUAL_SRC_BLEND))
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colors_written |= 0x2;
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if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_COLOR)) {
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if (colors_written == 0)
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colors_written = UINT64_MAX; /* color0_writes_all_cbufs */
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else
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colors_written |= 0x1;
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}
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}
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/* Remove holes in spi_shader_col_format. */
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for (i = 0; i < num_targets; i++) {
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unsigned spi_format = (spi_shader_col_format >> (i * 4)) & 0xf;
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if (spi_format) {
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if (spi_format && (colors_written & 1u << num_mrts)) {
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value |= spi_format << (num_mrts * 4);
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num_mrts++;
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}
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@ -346,7 +359,7 @@ void si_get_shader_variant_info(struct si_shader *shader,
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}
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}
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si_shader_update_spi_shader_formats(shader);
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si_shader_update_spi_shader_formats(shader, nir);
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/* ACO needs spi_ps_input_ena before si_init_shader_args. */
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shader->config.spi_ps_input_ena =
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