fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-24 13:10:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

intel/genxml: add a command VD_CONTROL_STATE to gen12/125

Browse source 
It's essentially needed to execute hevc decoding on gen12.

Note that we set HCP by default.
 - Command OpCode : VDENC(1), HCP(7), AVP(3)
 - SubOpcode      : HCP(10), VDENC(11)

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
This commit is contained in:
Hyunjun Ko 2023-04-26 09:51:54 +09:00 • committed by Marge Bot
parent 27dcd18210
commit d5f8265e05
2 changed files with 22 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
src/intel/genxml/gen12.xml
View file

@ -6773,6 +6773,17 @@
<field name="HEVC/VP9 Weights Backward Reference 0" start="80" end="87" type="int" />
<field name="HEVC/VP9 Offset Backward Reference 0" start="88" end="95" type="int" />
</instruction>
<instruction name="VD_CONTROL_STATE" bias="2" length="3" engine="video">
<field name="DWord Length" start="0" end="11" type="uint" default="1" />
<field name="SubOpcode" start="16" end="22" type="uint" default="10" />
<field name="Media Command OpCode" start="23" end="26" type="uint" default="7" />
<field name="Pipeline" start="27" end="28" type="uint" default="2" />
<field name="Command Type" start="29" end="31" type="uint" default="3" />
<field name="Pipeline Initialization" start="32" end="32" type="bool" />
<field name="Scalable Mode Pipe Lock" start="64" end="64" type="bool" />
<field name="Scalable Mode Pipe Unlock" start="65" end="65" type="bool" />
<field name="Memory Implicit Flush" start="66" end="66" type="bool" />
</instruction>
<instruction name="VD_PIPELINE_FLUSH" bias="2" length="2" engine="video">
<field name="DWord Length" start="0" end="11" type="uint" default="0" />
<field name="SubOpcode B" start="16" end="20" type="uint" default="0" />

11
src/intel/genxml/gen125.xml
View file

@ -7144,6 +7144,17 @@
<field name="HEVC/VP9 Weights Backward Reference 0" start="80" end="87" type="int" />
<field name="HEVC/VP9 Offset Backward Reference 0" start="88" end="95" type="int" />
</instruction>
<instruction name="VD_CONTROL_STATE" bias="2" length="3" engine="video">
<field name="DWord Length" start="0" end="11" type="uint" default="1" />
<field name="SubOpcode" start="16" end="22" type="uint" default="10" />
<field name="Media Command OpCode" start="23" end="26" type="uint" default="7" />
<field name="Pipeline" start="27" end="28" type="uint" default="2" />
<field name="Command Type" start="29" end="31" type="uint" default="3" />
<field name="Pipeline Initialization" start="32" end="32" type="bool" />
<field name="Scalable Mode Pipe Lock" start="64" end="64" type="bool" />
<field name="Scalable Mode Pipe Unlock" start="65" end="65" type="bool" />
<field name="Memory Implicit Flush" start="66" end="66" type="bool" />
</instruction>
<instruction name="VD_PIPELINE_FLUSH" bias="2" length="2" engine="video">
<field name="DWord Length" start="0" end="11" type="uint" default="0" />
<field name="SubOpcode B" start="16" end="20" type="uint" default="0" />