From d5ef8a0ac036cf6280fe60415563abf79c2e5bc3 Mon Sep 17 00:00:00 2001
From: Ganesh Belgur Ramachandra <ganesh.belgurramachandra@amd.com>
Date: Wed, 15 Nov 2023 01:12:40 -0600
Subject: [PATCH] radeonsi: enable nir pass for 64 bit operations

Enables optimisations for divide-by-constant which are
required in some shaders. e.g. si_create_query_result_cs()

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25972>
---
 src/gallium/drivers/radeonsi/si_shader_nir.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 3f84fbdf89e..ffc1dcf4469 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -283,6 +283,7 @@ static void si_lower_nir(struct si_screen *sscreen, struct nir_shader *nir)
     * - ensure constant offsets for texture instructions are folded
     *   and copy-propagated
     */
+   NIR_PASS_V(nir, nir_lower_int64);
 
    const struct nir_lower_tex_options lower_tex_options = {
       .lower_txp = ~0u,