diff --git a/.pick_status.json b/.pick_status.json
index 1c61c0f1ead..cc3808b4ea3 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -1594,7 +1594,7 @@
         "description": "radeonsi: disable binning correctly on gfx11.5",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "b44a886b84c91320f170bd108213768bb47ff6a3",
         "notes": null
diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c
index 39a97ebd0ce..984586eb864 100644
--- a/src/gallium/drivers/radeonsi/si_state_binning.c
+++ b/src/gallium/drivers/radeonsi/si_state_binning.c
@@ -393,6 +393,9 @@ static void si_emit_dpbb_disable(struct si_context *sctx)
    if (sctx->gfx_level >= GFX10) {
       struct uvec2 bin_size = {};
       struct uvec2 bin_size_extend = {};
+      unsigned binning_disabled =
+         sctx->gfx_level >= GFX11_5 ? V_028C44_BINNING_DISABLED
+                                    : V_028C44_DISABLE_BINNING_USE_NEW_SC;
 
       bin_size.x = 128;
       bin_size.y = sctx->framebuffer.min_bytes_per_pixel <= 4 ? 128 : 64;
@@ -404,7 +407,7 @@ static void si_emit_dpbb_disable(struct si_context *sctx)
 
       radeon_opt_set_context_reg(sctx, R_028C44_PA_SC_BINNER_CNTL_0,
                                  SI_TRACKED_PA_SC_BINNER_CNTL_0,
-                                 S_028C44_BINNING_MODE(V_028C44_DISABLE_BINNING_USE_NEW_SC) |
+                                 S_028C44_BINNING_MODE(binning_disabled) |
                                  S_028C44_BIN_SIZE_X(bin_size.x == 16) |
                                  S_028C44_BIN_SIZE_Y(bin_size.y == 16) |
                                  S_028C44_BIN_SIZE_X_EXTEND(bin_size_extend.x) |