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i965: Drop i915-specific blit clear code.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Eric Anholt
Kenneth Graunke
parent
cf31a19300
commit
d58d0a3754
2 changed files with 0 additions and 180 deletions
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@ -395,184 +395,6 @@ intelEmitCopyBlit(struct intel_context *intel,
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return true;
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}
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/**
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* Use blitting to clear the renderbuffers named by 'flags'.
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* Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field
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* since that might include software renderbuffers or renderbuffers
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* which we're clearing with triangles.
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* \param mask bitmask of BUFFER_BIT_* values indicating buffers to clear
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*/
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GLbitfield
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intelClearWithBlit(struct gl_context *ctx, GLbitfield mask)
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{
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struct intel_context *intel = intel_context(ctx);
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struct gl_framebuffer *fb = ctx->DrawBuffer;
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GLuint clear_depth_value, clear_depth_mask;
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GLint cx, cy, cw, ch;
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GLbitfield fail_mask = 0;
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BATCH_LOCALS;
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/* Note: we don't use this function on Gen7+ hardware, so we can safely
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* ignore fast color clear issues.
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*/
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assert(intel->gen < 7);
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/*
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* Compute values for clearing the buffers.
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*/
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clear_depth_value = 0;
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clear_depth_mask = 0;
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if (mask & BUFFER_BIT_DEPTH) {
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clear_depth_value = (GLuint) (fb->_DepthMax * ctx->Depth.Clear);
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clear_depth_mask = XY_BLT_WRITE_RGB;
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}
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if (mask & BUFFER_BIT_STENCIL) {
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clear_depth_value |= (ctx->Stencil.Clear & 0xff) << 24;
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clear_depth_mask |= XY_BLT_WRITE_ALPHA;
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}
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cx = fb->_Xmin;
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if (_mesa_is_winsys_fbo(fb))
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cy = ctx->DrawBuffer->Height - fb->_Ymax;
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else
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cy = fb->_Ymin;
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cw = fb->_Xmax - fb->_Xmin;
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ch = fb->_Ymax - fb->_Ymin;
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if (cw == 0 || ch == 0)
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return 0;
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/* Loop over all renderbuffers */
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mask &= (1 << BUFFER_COUNT) - 1;
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while (mask) {
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GLuint buf = ffs(mask) - 1;
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bool is_depth_stencil = buf == BUFFER_DEPTH || buf == BUFFER_STENCIL;
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struct intel_renderbuffer *irb;
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int x1, y1, x2, y2;
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uint32_t clear_val;
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uint32_t BR13, CMD;
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struct intel_region *region;
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int pitch, cpp;
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drm_intel_bo *aper_array[2];
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mask &= ~(1 << buf);
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irb = intel_get_renderbuffer(fb, buf);
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if (irb && irb->mt) {
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region = irb->mt->region;
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assert(region);
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assert(region->bo);
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} else {
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fail_mask |= 1 << buf;
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continue;
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}
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/* OK, clear this renderbuffer */
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x1 = cx + irb->draw_x;
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y1 = cy + irb->draw_y;
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x2 = cx + cw + irb->draw_x;
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y2 = cy + ch + irb->draw_y;
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pitch = region->pitch;
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cpp = region->cpp;
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DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
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__FUNCTION__,
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region->bo, pitch,
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x1, y1, x2 - x1, y2 - y1);
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BR13 = 0xf0 << 16;
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CMD = XY_COLOR_BLT_CMD;
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/* Setup the blit command */
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if (cpp == 4) {
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if (is_depth_stencil) {
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CMD |= clear_depth_mask;
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} else {
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/* clearing RGBA */
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CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
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}
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}
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assert(region->tiling != I915_TILING_Y);
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if (region->tiling != I915_TILING_NONE) {
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CMD |= XY_DST_TILED;
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pitch /= 4;
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}
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BR13 |= pitch;
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if (is_depth_stencil) {
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clear_val = clear_depth_value;
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} else {
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uint8_t clear[4];
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GLfloat *color = ctx->Color.ClearColor.f;
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_mesa_unclamped_float_rgba_to_ubyte(clear, color);
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switch (intel_rb_format(irb)) {
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case MESA_FORMAT_ARGB8888:
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case MESA_FORMAT_XRGB8888:
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clear_val = PACK_COLOR_8888(clear[3], clear[0],
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clear[1], clear[2]);
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break;
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case MESA_FORMAT_RGB565:
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clear_val = PACK_COLOR_565(clear[0], clear[1], clear[2]);
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break;
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case MESA_FORMAT_ARGB4444:
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clear_val = PACK_COLOR_4444(clear[3], clear[0],
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clear[1], clear[2]);
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break;
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case MESA_FORMAT_ARGB1555:
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clear_val = PACK_COLOR_1555(clear[3], clear[0],
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clear[1], clear[2]);
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break;
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case MESA_FORMAT_A8:
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clear_val = PACK_COLOR_8888(clear[3], clear[3],
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clear[3], clear[3]);
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break;
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default:
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fail_mask |= 1 << buf;
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continue;
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}
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}
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BR13 |= br13_for_cpp(cpp);
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assert(x1 < x2);
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assert(y1 < y2);
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/* do space check before going any further */
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aper_array[0] = intel->batch.bo;
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aper_array[1] = region->bo;
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if (drm_intel_bufmgr_check_aperture_space(aper_array,
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ARRAY_SIZE(aper_array)) != 0) {
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intel_batchbuffer_flush(intel);
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}
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BEGIN_BATCH_BLT(6);
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OUT_BATCH(CMD | (6 - 2));
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OUT_BATCH(BR13);
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OUT_BATCH((y1 << 16) | x1);
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OUT_BATCH((y2 << 16) | x2);
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OUT_RELOC_FENCED(region->bo,
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I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
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0);
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OUT_BATCH(clear_val);
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ADVANCE_BATCH();
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if (intel->always_flush_cache)
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intel_batchbuffer_emit_mi_flush(intel);
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if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL)
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mask &= ~(BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL);
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}
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return fail_mask;
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}
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bool
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intelEmitImmediateColorExpandBlit(struct intel_context *intel,
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GLuint cpp,
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@ -33,8 +33,6 @@
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extern void intelCopyBuffer(const __DRIdrawable * dpriv,
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const drm_clip_rect_t * rect);
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extern GLbitfield intelClearWithBlit(struct gl_context * ctx, GLbitfield mask);
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bool
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intelEmitCopyBlit(struct intel_context *intel,
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GLuint cpp,
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