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pvr: add pipeline handling to use dynamic rendering info
This change also preserves the functionality of the old renderpass path. Signed-off-by: Ella Stanforth <ella@igalia.com> Co-authored-by: Luigi Santivetti <luigi.santivetti@imgtec.com> Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744>
This commit is contained in:
Ella Stanforth
Marge Bot
parent
a7de9dae6b
commit
d549c1d045
1 changed files with 253 additions and 38 deletions
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@ -67,6 +67,7 @@
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#include "vk_render_pass.h"
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#include "vk_util.h"
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#include "vulkan/runtime/vk_pipeline.h"
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#include "vulkan/vulkan_core.h"
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/*****************************************************************************
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PDS functions
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@ -951,12 +952,14 @@ pvr_preprocess_shader_data(pco_data *data,
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nir_shader *nir,
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const void *pCreateInfo,
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struct vk_pipeline_layout *layout,
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const struct vk_graphics_pipeline_state *state);
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const struct vk_graphics_pipeline_state *state,
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struct usc_mrt_setup *mrt_setup);
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static void pvr_postprocess_shader_data(pco_data *data,
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nir_shader *nir,
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const void *pCreateInfo,
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struct vk_pipeline_layout *layout);
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struct vk_pipeline_layout *layout,
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struct usc_mrt_setup *setup);
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/******************************************************************************
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Compute pipeline functions
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@ -1005,10 +1008,10 @@ static VkResult pvr_compute_pipeline_compile(
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pvr_early_init_shader_data(&shader_data, nir, pCreateInfo);
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pco_preprocess_nir(pco_ctx, nir);
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pvr_preprocess_shader_data(&shader_data, nir, pCreateInfo, layout, NULL);
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pvr_preprocess_shader_data(&shader_data, nir, pCreateInfo, layout, NULL, NULL);
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pco_lower_nir(pco_ctx, nir, &shader_data);
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pco_postprocess_nir(pco_ctx, nir, &shader_data);
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pvr_postprocess_shader_data(&shader_data, nir, pCreateInfo, layout);
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pvr_postprocess_shader_data(&shader_data, nir, pCreateInfo, layout, NULL);
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cs = pco_trans_nir(pco_ctx, nir, &shader_data, shader_mem_ctx);
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if (!cs) {
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@ -1954,6 +1957,37 @@ pvr_init_fs_outputs(pco_data *data,
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}
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}
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static void
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pvr_init_fs_outputs_mrt(pco_data *data,
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const struct vk_render_pass_state *rp,
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const struct usc_mrt_setup *setup)
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{
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unsigned u;
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pco_fs_data *fs = &data->fs;
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for (u = 0; u < PVR_MAX_COLOR_ATTACHMENTS; u++) {
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if (!(rp->attachments & MESA_VK_RP_ATTACHMENT_COLOR_BIT(u)))
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continue;
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const struct usc_mrt_resource *mrt_resource = &setup->mrt_resources[u];
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bool tile_buffer;
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gl_frag_result location = FRAG_RESULT_DATA0 + u;
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VkFormat vk_format = rp->color_attachment_formats[u];
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fs->output_formats[location] = vk_format_to_pipe_format(vk_format);
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tile_buffer = mrt_resource->type != USC_MRT_RESOURCE_TYPE_OUTPUT_REG;
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if (tile_buffer) {
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fs->num_tile_buffers =
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MAX2(fs->num_tile_buffers, mrt_resource->mem.tile_buffer + 1);
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fs->output_tile_buffers |= BITFIELD_BIT(u);
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}
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}
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fs->z_replicate = ~0u;
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}
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static void
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pvr_setup_fs_outputs(pco_data *data,
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nir_shader *nir,
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@ -2019,6 +2053,42 @@ pvr_setup_fs_outputs(pco_data *data,
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assert(!outputs_written);
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}
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static void
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pvr_setup_fs_outputs_mrt(pco_data *data,
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nir_shader *nir,
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const struct usc_mrt_setup *setup)
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{
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uint64_t outputs_written = nir->info.outputs_written;
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pco_fs_data *fs = &data->fs;
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unsigned u;
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for (u = 0; u < setup->num_render_targets; u++) {
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gl_frag_result location = FRAG_RESULT_DATA0 + u;
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const struct usc_mrt_resource *mrt_resource = &setup->mrt_resources[u];
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bool tile_buffer;
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nir_variable *var;
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var = nir_find_variable_with_location(nir, nir_var_shader_out, location);
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if (!var)
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continue;
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tile_buffer = fs->output_tile_buffers & BITFIELD_BIT(u);
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set_var(fs->outputs,
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tile_buffer ? mrt_resource->mem.tile_buffer
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: mrt_resource->reg.output_reg,
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var,
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DIV_ROUND_UP(mrt_resource->intermediate_size, sizeof(uint32_t)));
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if (tile_buffer)
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fs->outputs[location].offset = mrt_resource->mem.offset_dw;
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outputs_written &= ~BITFIELD64_BIT(location);
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}
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assert(!outputs_written);
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}
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static void pvr_init_fs_input_attachments(
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pco_data *data,
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const struct pvr_render_pass *pass,
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@ -2062,6 +2132,32 @@ static void pvr_init_fs_input_attachments(
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}
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}
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static void pvr_init_fs_input_attachments_mrt(
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pco_data *data,
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const struct vk_render_pass_state *rp,
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const struct usc_mrt_setup *setup)
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{
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pco_fs_data *fs = &data->fs;
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for (unsigned u = 0; u < rp->color_attachment_count; u++) {
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VkFormat vk_format = rp->color_attachment_formats[u];
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bool has_stencil = vk_format_has_stencil(vk_format);
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fs->ia_formats[u] = vk_format_to_pipe_format(vk_format);
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assert(fs->ia_formats[u] != PIPE_FORMAT_NONE);
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if (has_stencil)
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fs->ia_has_stencil |= BITFIELD_BIT(u);
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const struct usc_mrt_resource *mrt_resource = &setup->mrt_resources[u];
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bool tile_buffer = mrt_resource->type != USC_MRT_RESOURCE_TYPE_OUTPUT_REG;
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if (tile_buffer) {
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fs->num_tile_buffers =
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MAX2(fs->num_tile_buffers, mrt_resource->mem.tile_buffer + 1);
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fs->ia_tile_buffers |= BITFIELD_BIT(u);
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}
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}
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}
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static void pvr_init_fs_blend(pco_data *data,
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const struct vk_color_blend_state *cb)
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{
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@ -2142,6 +2238,29 @@ static void pvr_setup_fs_input_attachments(
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}
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}
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static void pvr_setup_fs_input_attachments_mrt(
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pco_data *data,
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nir_shader *nir,
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struct usc_mrt_setup *setup)
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{
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pco_fs_data *fs = &data->fs;
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for (unsigned u = 0; u < setup->num_render_targets; ++u) {
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const struct usc_mrt_resource *mrt_resource = &setup->mrt_resources[u];
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bool tile_buffer = fs->ia_tile_buffers & BITFIELD_BIT(u);
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fs->ias_onchip[u] = (pco_range){
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.start = tile_buffer ? mrt_resource->mem.tile_buffer
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: mrt_resource->reg.output_reg,
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.count =
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DIV_ROUND_UP(mrt_resource->intermediate_size, sizeof(uint32_t)),
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};
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if (tile_buffer)
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fs->ias_onchip[u].offset = mrt_resource->mem.offset_dw;
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}
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}
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static void pvr_setup_fs_blend(pco_data *data)
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{
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unsigned num_blend_consts = util_bitcount(data->fs.blend_consts_needed);
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@ -2466,7 +2585,8 @@ pvr_preprocess_shader_data(pco_data *data,
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nir_shader *nir,
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const void *pCreateInfo,
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struct vk_pipeline_layout *layout,
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const struct vk_graphics_pipeline_state *state)
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const struct vk_graphics_pipeline_state *state,
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struct usc_mrt_setup *mrt_setup)
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{
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const VkGraphicsPipelineCreateInfo *pGraphicsCreateInfo = pCreateInfo;
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@ -2480,17 +2600,23 @@ pvr_preprocess_shader_data(pco_data *data,
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}
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case MESA_SHADER_FRAGMENT: {
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VK_FROM_HANDLE(pvr_render_pass, pass, pGraphicsCreateInfo->renderPass);
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const struct pvr_render_subpass *const subpass =
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&pass->subpasses[pGraphicsCreateInfo->subpass];
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const struct pvr_renderpass_hw_map *subpass_map =
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&pass->hw_setup->subpass_map[pGraphicsCreateInfo->subpass];
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const struct pvr_renderpass_hwsetup_subpass *hw_subpass =
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&pass->hw_setup->renders[subpass_map->render]
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.subpasses[subpass_map->subpass];
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if (pGraphicsCreateInfo->renderPass) {
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VK_FROM_HANDLE(pvr_render_pass, pass, pGraphicsCreateInfo->renderPass);
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const struct pvr_render_subpass *const subpass =
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&pass->subpasses[pGraphicsCreateInfo->subpass];
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const struct pvr_renderpass_hw_map *subpass_map =
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&pass->hw_setup->subpass_map[pGraphicsCreateInfo->subpass];
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const struct pvr_renderpass_hwsetup_subpass *hw_subpass =
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&pass->hw_setup->renders[subpass_map->render]
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.subpasses[subpass_map->subpass];
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pvr_init_fs_outputs(data, pass, subpass, hw_subpass);
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pvr_init_fs_input_attachments(data, pass, subpass, hw_subpass);
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} else {
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pvr_init_fs_outputs_mrt(data, state->rp, mrt_setup);
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pvr_init_fs_input_attachments_mrt(data, state->rp, mrt_setup);
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}
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pvr_init_fs_outputs(data, pass, subpass, hw_subpass);
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pvr_init_fs_input_attachments(data, pass, subpass, hw_subpass);
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pvr_init_fs_blend(data, state->cb);
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pvr_init_fs_tile_buffers(data);
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@ -2522,7 +2648,8 @@ pvr_preprocess_shader_data(pco_data *data,
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static void pvr_postprocess_shader_data(pco_data *data,
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nir_shader *nir,
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const void *pCreateInfo,
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struct vk_pipeline_layout *layout)
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struct vk_pipeline_layout *layout,
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struct usc_mrt_setup *mrt_setup)
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{
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const VkGraphicsPipelineCreateInfo *pGraphicsCreateInfo = pCreateInfo;
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@ -2535,19 +2662,25 @@ static void pvr_postprocess_shader_data(pco_data *data,
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}
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case MESA_SHADER_FRAGMENT: {
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VK_FROM_HANDLE(pvr_render_pass, pass, pGraphicsCreateInfo->renderPass);
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const struct pvr_render_subpass *const subpass =
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&pass->subpasses[pGraphicsCreateInfo->subpass];
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const struct pvr_renderpass_hw_map *subpass_map =
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&pass->hw_setup->subpass_map[pGraphicsCreateInfo->subpass];
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const struct pvr_renderpass_hwsetup_subpass *hw_subpass =
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&pass->hw_setup->renders[subpass_map->render]
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.subpasses[subpass_map->subpass];
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pvr_alloc_fs_sysvals(data, nir);
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pvr_alloc_fs_varyings(data, nir);
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pvr_setup_fs_outputs(data, nir, subpass, hw_subpass);
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pvr_setup_fs_input_attachments(data, nir, subpass, hw_subpass);
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if (pGraphicsCreateInfo->renderPass) {
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VK_FROM_HANDLE(pvr_render_pass, pass, pGraphicsCreateInfo->renderPass);
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const struct pvr_render_subpass *const subpass =
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&pass->subpasses[pGraphicsCreateInfo->subpass];
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const struct pvr_renderpass_hw_map *subpass_map =
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&pass->hw_setup->subpass_map[pGraphicsCreateInfo->subpass];
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const struct pvr_renderpass_hwsetup_subpass *hw_subpass =
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&pass->hw_setup->renders[subpass_map->render]
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.subpasses[subpass_map->subpass];
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pvr_setup_fs_outputs(data, nir, subpass, hw_subpass);
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pvr_setup_fs_input_attachments(data, nir, subpass, hw_subpass);
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} else {
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pvr_setup_fs_outputs_mrt(data, nir, mrt_setup);
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pvr_setup_fs_input_attachments_mrt(data, nir, mrt_setup);
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}
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pvr_setup_fs_blend(data);
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pvr_setup_fs_tile_buffers(data);
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pvr_setup_fs_sample_locations(data);
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@ -2581,7 +2714,21 @@ static void pvr_early_init_shader_data(pco_data *data,
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case MESA_SHADER_VERTEX:
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case MESA_SHADER_FRAGMENT: {
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VK_FROM_HANDLE(pvr_render_pass, pass, pGraphicsCreateInfo->renderPass);
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data->common.multiview = pass->multiview_enabled;
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if (pass) {
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data->common.multiview = pass->multiview_enabled;
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} else {
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const VkPipelineRenderingCreateInfo *ri =
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vk_find_struct_const(pGraphicsCreateInfo->pNext,
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PIPELINE_RENDERING_CREATE_INFO);
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data->common.multiview = !!ri->viewMask;
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}
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nir_foreach_variable_with_modes (var, nir, nir_var_system_value) {
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if (var->data.location == SYSTEM_VALUE_VIEW_INDEX) {
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data->common.multiview = true;
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break;
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}
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}
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break;
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}
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@ -2613,6 +2760,19 @@ pvr_graphics_pipeline_compile(struct pvr_device *const device,
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struct pvr_fragment_shader_state *fragment_state =
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&gfx_pipeline->shader_state.fragment;
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struct usc_mrt_setup mrt_setup = { 0 };
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if (!pCreateInfo->renderPass) {
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const struct vk_render_pass_state *rp = state->rp;
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result = pvr_init_usc_mrt_setup(device,
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rp->color_attachment_count,
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rp->color_attachment_formats,
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&mrt_setup);
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if (result != VK_SUCCESS)
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return result;
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}
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pco_ctx *pco_ctx = device->pdevice->pco_ctx;
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nir_shader *producer = NULL;
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@ -2685,7 +2845,8 @@ pvr_graphics_pipeline_compile(struct pvr_device *const device,
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nir_shaders[stage],
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pCreateInfo,
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layout,
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state);
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state,
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&mrt_setup);
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pco_lower_nir(pco_ctx, nir_shaders[stage], &shader_data[stage]);
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@ -2694,9 +2855,13 @@ pvr_graphics_pipeline_compile(struct pvr_device *const device,
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pvr_postprocess_shader_data(&shader_data[stage],
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nir_shaders[stage],
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pCreateInfo,
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layout);
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layout,
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&mrt_setup);
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}
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if (!pCreateInfo->renderPass)
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pvr_destroy_mrt_setup(device, &mrt_setup);
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for (mesa_shader_stage stage = 0; stage < MESA_SHADER_STAGES; ++stage) {
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pco_shader **pco = &pco_shaders[stage];
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@ -2834,16 +2999,67 @@ err_free_vertex_bo:
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pvr_bo_suballoc_free(vertex_state->shader_bo);
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err_free_build_context:
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ralloc_free(shader_mem_ctx);
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if (!pCreateInfo->renderPass)
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pvr_destroy_mrt_setup(device, &mrt_setup);
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return result;
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}
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static struct vk_render_pass_state
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pvr_create_renderpass_state(const VkGraphicsPipelineCreateInfo *const info)
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static void
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pvr_rendering_info_setup(const VkGraphicsPipelineCreateInfo *const info,
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struct vk_render_pass_state *rp)
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{
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const VkPipelineRenderingCreateInfo *ri =
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vk_find_struct_const(info->pNext,
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PIPELINE_RENDERING_CREATE_INFO);
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if (!ri) {
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/* From the Vulkan spec for VkPipelineRenderingCreateInfo:
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*
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* "if this structure is not specified, and the pipeline does not include
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* a VkRenderPass, viewMask and colorAttachmentCount are 0, and
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* depthAttachmentFormat and stencilAttachmentFormat are
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* VK_FORMAT_UNDEFINED.
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*/
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*rp = (struct vk_render_pass_state){
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.view_mask = 0,
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.attachments = 0,
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.color_attachment_count = 0,
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.depth_attachment_format = VK_FORMAT_UNDEFINED,
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.stencil_attachment_format = VK_FORMAT_UNDEFINED,
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};
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return;
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}
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rp->view_mask = ri->viewMask;
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rp->attachments = 0;
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rp->color_attachment_count = ri->colorAttachmentCount;
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for (int i = 0; i < ri->colorAttachmentCount; i++) {
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rp->color_attachment_formats[i] = ri->pColorAttachmentFormats[i];
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if (rp->color_attachment_formats[i] != VK_FORMAT_UNDEFINED)
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rp->attachments |= MESA_VK_RP_ATTACHMENT_COLOR_BIT(i);
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}
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rp->depth_attachment_format = ri->depthAttachmentFormat;
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if (ri->depthAttachmentFormat != VK_FORMAT_UNDEFINED)
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rp->attachments |= MESA_VK_RP_ATTACHMENT_DEPTH_BIT;
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rp->stencil_attachment_format = ri->stencilAttachmentFormat;
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if (ri->stencilAttachmentFormat != VK_FORMAT_UNDEFINED)
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rp->attachments |= MESA_VK_RP_ATTACHMENT_STENCIL_BIT;
|
||||
}
|
||||
|
||||
static void
|
||||
pvr_create_renderpass_state(const VkGraphicsPipelineCreateInfo *const info,
|
||||
struct vk_render_pass_state *rp)
|
||||
{
|
||||
if (!info->renderPass)
|
||||
return pvr_rendering_info_setup(info, rp);
|
||||
|
||||
VK_FROM_HANDLE(pvr_render_pass, pass, info->renderPass);
|
||||
const struct pvr_render_subpass *const subpass =
|
||||
&pass->subpasses[info->subpass];
|
||||
|
||||
enum vk_rp_attachment_flags attachments = 0;
|
||||
|
||||
assert(info->subpass < pass->subpass_count);
|
||||
|
|
@ -2865,7 +3081,7 @@ pvr_create_renderpass_state(const VkGraphicsPipelineCreateInfo *const info)
|
|||
attachments |= MESA_VK_RP_ATTACHMENT_STENCIL_BIT;
|
||||
}
|
||||
|
||||
return (struct vk_render_pass_state){
|
||||
*rp = (struct vk_render_pass_state){
|
||||
.attachments = attachments,
|
||||
.view_mask = subpass->view_mask,
|
||||
};
|
||||
|
|
@ -2880,14 +3096,13 @@ pvr_graphics_pipeline_init(struct pvr_device *device,
|
|||
{
|
||||
struct vk_dynamic_graphics_state *const dynamic_state =
|
||||
&gfx_pipeline->dynamic_state;
|
||||
const struct vk_render_pass_state rp_state =
|
||||
pvr_create_renderpass_state(pCreateInfo);
|
||||
|
||||
struct vk_graphics_pipeline_all_state all_state;
|
||||
struct vk_graphics_pipeline_state state = { 0 };
|
||||
|
||||
struct vk_render_pass_state rp_state;
|
||||
VkResult result;
|
||||
|
||||
pvr_create_renderpass_state(pCreateInfo, &rp_state);
|
||||
|
||||
pvr_pipeline_init(device,
|
||||
PVR_PIPELINE_TYPE_GRAPHICS,
|
||||
pCreateInfo->layout,
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue