fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-24 15:20:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

aco/ra: fix register allocation of branch definitions

Browse source 
fossil-db (Sienna Cichlid):
Totals from 704 (0.52% of 134913) affected shaders:
CodeSize: 7177288 -> 7182072 (+0.07%); split: -0.00%, +0.07%
Instrs: 1371781 -> 1372977 (+0.09%); split: -0.00%, +0.09%
Latency: 17993572 -> 18001344 (+0.04%); split: -0.00%, +0.04%
InvThroughput: 4198996 -> 4199569 (+0.01%); split: -0.00%, +0.01%
Copies: 122456 -> 123516 (+0.87%); split: -0.01%, +0.88%
Branches: 43815 -> 43818 (+0.01%); split: -0.02%, +0.03%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13432>
This commit is contained in:
Rhys Perry 2021-07-28 16:30:57 +01:00 • committed by Marge Bot
parent 608d48b787
commit d5349a99c2
1 changed files with 24 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

24
src/amd/compiler/aco_register_allocation.cpp
View file

@ -71,6 +71,7 @@ struct ra_ctx {
std::unordered_map<unsigned, Instruction*> vectors;
std::unordered_map<unsigned, Instruction*> split_vectors;
aco_ptr<Instruction> pseudo_dummy;
aco_ptr<Instruction> phi_dummy;
uint16_t max_used_sgpr = 0;
uint16_t max_used_vgpr = 0;
uint16_t sgpr_limit;
@ -86,6 +87,8 @@ struct ra_ctx {
{
pseudo_dummy.reset(
create_instruction<Instruction>(aco_opcode::p_parallelcopy, Format::PSEUDO, 0, 0));
phi_dummy.reset(
create_instruction<Instruction>(aco_opcode::p_linear_phi, Format::PSEUDO, 0, 0));
sgpr_limit = get_addr_sgpr_from_waves(program, program->min_waves);
vgpr_limit = get_addr_sgpr_from_waves(program, program->min_waves);
}
@ -2508,6 +2511,27 @@ register_allocation(Program* program, std::vector<IDSet>& live_out_per_block, ra
* We consider them incomplete phis and only handle the definition. */
get_regs_for_phis(ctx, block, register_file, instructions, live_out_per_block[block.index]);
/* If this is a merge block, the state of the register file at the branch instruction of the
* predecessors corresponds to the state after phis at the merge block. So, we allocate a
* register for the predecessor's branch definitions as if there was a phi.
*/
if (!block.linear_preds.empty() &&
(block.linear_preds.size() != 1 ||
program->blocks[block.linear_preds[0]].linear_succs.size() == 1)) {
PhysReg br_reg = get_reg_phi(ctx, live_out_per_block[block.index], register_file,
instructions, block, ctx.phi_dummy, Temp(0, s2));
for (unsigned pred : block.linear_preds) {
aco_ptr<Instruction>& br = program->blocks[pred].instructions.back();
if (br->definitions.empty())
continue;
assert(br->definitions.size() == 1 && br->definitions[0].regClass() == s2 &&
br->definitions[0].isKill());
br->definitions[0].setFixed(br_reg);
}
}
/* fill in sgpr_live_in */
for (unsigned i = 0; i <= ctx.max_used_sgpr; i++)
sgpr_live_in[block.index][i] = register_file[PhysReg{i}];