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radeon/llvm: Only support 512 constant registers on R600

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This is necessary upcoming encoding changes, since we will only be
using 9-bits for register encoding.
This commit is contained in:
Tom Stellard 2012-09-19 12:23:20 -04:00
parent 5abb1f8bde
commit d525ed1a84
1 changed files with 1 additions and 1 deletions
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2
src/gallium/drivers/radeon/R600GenRegisterInfo.pl
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@ -16,7 +16,7 @@
use strict;
use warnings;
use constant CONST_REG_COUNT => 1024;
use constant CONST_REG_COUNT => 512;
use constant TEMP_REG_COUNT => 128;
my $CREG_MAX = CONST_REG_COUNT - 1;