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r600: enable TEXCOORD semantic for TGSI.

Browse source 
This should make intergrating with NIR easier

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5083>
This commit is contained in:
Dave Airlie 2020-05-18 14:04:10 +10:00 • committed by Marge Bot
parent 68b3b5bcab
commit d50069ab08
6 changed files with 35 additions and 34 deletions
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21
src/gallium/drivers/r600/evergreen_state.c
View file

@ -514,15 +514,13 @@ static void *evergreen_create_rs_state(struct pipe_context *ctx,
}
spi_interp = S_0286D4_FLAT_SHADE_ENA(1);
if (state->sprite_coord_enable) {
spi_interp |= S_0286D4_PNT_SPRITE_ENA(1) |
S_0286D4_PNT_SPRITE_OVRD_X(2) |
S_0286D4_PNT_SPRITE_OVRD_Y(3) |
S_0286D4_PNT_SPRITE_OVRD_Z(0) |
S_0286D4_PNT_SPRITE_OVRD_W(1);
if (state->sprite_coord_mode != PIPE_SPRITE_COORD_UPPER_LEFT) {
spi_interp |= S_0286D4_PNT_SPRITE_TOP_1(1);
}
spi_interp |= S_0286D4_PNT_SPRITE_ENA(1) |
S_0286D4_PNT_SPRITE_OVRD_X(2) |
S_0286D4_PNT_SPRITE_OVRD_Y(3) |
S_0286D4_PNT_SPRITE_OVRD_Z(0) |
S_0286D4_PNT_SPRITE_OVRD_W(1);
if (state->sprite_coord_mode != PIPE_SPRITE_COORD_UPPER_LEFT) {
spi_interp |= S_0286D4_PNT_SPRITE_TOP_1(1);
}
r600_store_context_reg_seq(&rs->buffer, R_028A00_PA_SU_POINT_SIZE, 3);
@ -3389,8 +3387,9 @@ void evergreen_update_ps_state(struct pipe_context *ctx, struct r600_pipe_shader
tmp |= S_028644_FLAT_SHADE(1);
}
if (rshader->input[i].name == TGSI_SEMANTIC_GENERIC &&
(sprite_coord_enable & (1 << rshader->input[i].sid))) {
if (rshader->input[i].name == TGSI_SEMANTIC_PCOORD ||
(rshader->input[i].name == TGSI_SEMANTIC_TEXCOORD &&
(sprite_coord_enable & (1 << rshader->input[i].sid)))) {
tmp |= S_028644_PT_SPRITE_TEX(1);
}

2
src/gallium/drivers/r600/r600_pipe.c
View file

@ -339,7 +339,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
return rscreen->b.chip_class > R700;
case PIPE_CAP_TGSI_TEXCOORD:
return is_nir_enabled(&rscreen->b);
return 1;
case PIPE_CAP_FAKE_SW_MSAA:
return 0;

18
src/gallium/drivers/r600/r600_shader.c
View file

@ -689,6 +689,8 @@ static int r600_spi_sid(struct r600_shader_io * io)
else {
if (name == TGSI_SEMANTIC_GENERIC) {
/* For generic params simply use sid from tgsi */
index = 9 + io->sid;
} else if (name == TGSI_SEMANTIC_TEXCOORD) {
index = io->sid;
} else {
/* For non-generic params - pack name and sid into 8 bits */
@ -705,7 +707,7 @@ static int r600_spi_sid(struct r600_shader_io * io)
};
/* we need this to get a common lds index for vs/tcs/tes input/outputs */
int r600_get_lds_unique_index(unsigned semantic_name, unsigned index, bool texcoord_semantics)
int r600_get_lds_unique_index(unsigned semantic_name, unsigned index)
{
switch (semantic_name) {
case TGSI_SEMANTIC_POSITION:
@ -715,9 +717,11 @@ int r600_get_lds_unique_index(unsigned semantic_name, unsigned index, bool texco
case TGSI_SEMANTIC_CLIPDIST:
assert(index <= 1);
return 2 + index;
case TGSI_SEMANTIC_TEXCOORD:
return 4 + index;
case TGSI_SEMANTIC_GENERIC:
if (index <= 63-4)
return 4 + index - (texcoord_semantics ? 0 : 9);
return 4 + index;
else
/* same explanation as in the default statement,
* the only user hitting this is st/nine.
@ -1185,7 +1189,7 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx)
break;
else if (d->Semantic.Name == TGSI_SEMANTIC_TESSINNER ||
d->Semantic.Name == TGSI_SEMANTIC_TESSOUTER) {
int param = r600_get_lds_unique_index(d->Semantic.Name, 0, false);
int param = r600_get_lds_unique_index(d->Semantic.Name, 0);
int dreg = d->Semantic.Name == TGSI_SEMANTIC_TESSINNER ? 3 : 2;
unsigned temp_reg = r600_get_temp(ctx);
@ -2091,11 +2095,11 @@ static int r600_get_byte_address(struct r600_shader_ctx *ctx, int temp_reg,
return r;
param = r600_get_lds_unique_index(name[first],
index[first], false);
index[first]);
} else {
param = r600_get_lds_unique_index(name[reg.Register.Index],
index[reg.Register.Index], false);
index[reg.Register.Index]);
}
/* add to base_addr - passed in temp_reg.x */
@ -3039,7 +3043,7 @@ static int emit_lds_vs_writes(struct r600_shader_ctx *ctx)
for (i = 0; i < ctx->shader->noutput; i++) {
struct r600_bytecode_alu alu;
int param = r600_get_lds_unique_index(ctx->shader->output[i].name,
ctx->shader->output[i].sid, false);
ctx->shader->output[i].sid);
if (param) {
r = single_alu_op2(ctx, ALU_OP2_ADD_INT,
@ -3173,7 +3177,7 @@ static int r600_tess_factor_read(struct r600_shader_ctx *ctx,
int dreg = ctx->shader->output[output_idx].gpr;
int r;
param = r600_get_lds_unique_index(name, 0, false);
param = r600_get_lds_unique_index(name, 0);
r = get_lds_offset0(ctx, 1, temp_reg, true);
if (r)
return r;

2
src/gallium/drivers/r600/r600_shader.h
View file

@ -189,7 +189,7 @@ struct r600_pipe_shader {
TGSI_INTERPOLATE_LOC_CENTER/SAMPLE/COUNT. Other input values return -1. */
int eg_get_interpolator_index(unsigned interpolate, unsigned location);
int r600_get_lds_unique_index(unsigned semantic_name, unsigned index, bool texcoord_semantics);
int r600_get_lds_unique_index(unsigned semantic_name, unsigned index);
int generate_gs_copy_shader(struct r600_context *rctx,
struct r600_pipe_shader *gs,

21
src/gallium/drivers/r600/r600_state.c
View file

@ -520,15 +520,13 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
}
spi_interp = S_0286D4_FLAT_SHADE_ENA(1);
if (state->sprite_coord_enable) {
spi_interp |= S_0286D4_PNT_SPRITE_ENA(1) |
S_0286D4_PNT_SPRITE_OVRD_X(2) |
S_0286D4_PNT_SPRITE_OVRD_Y(3) |
S_0286D4_PNT_SPRITE_OVRD_Z(0) |
S_0286D4_PNT_SPRITE_OVRD_W(1);
if (state->sprite_coord_mode != PIPE_SPRITE_COORD_UPPER_LEFT) {
spi_interp |= S_0286D4_PNT_SPRITE_TOP_1(1);
}
spi_interp |= S_0286D4_PNT_SPRITE_ENA(1) |
S_0286D4_PNT_SPRITE_OVRD_X(2) |
S_0286D4_PNT_SPRITE_OVRD_Y(3) |
S_0286D4_PNT_SPRITE_OVRD_Z(0) |
S_0286D4_PNT_SPRITE_OVRD_W(1);
if (state->sprite_coord_mode != PIPE_SPRITE_COORD_UPPER_LEFT) {
spi_interp |= S_0286D4_PNT_SPRITE_TOP_1(1);
}
r600_store_context_reg_seq(&rs->buffer, R_028A00_PA_SU_POINT_SIZE, 3);
@ -2474,8 +2472,9 @@ void r600_update_ps_state(struct pipe_context *ctx, struct r600_pipe_shader *sha
rctx->rasterizer && rctx->rasterizer->flatshade))
tmp |= S_028644_FLAT_SHADE(1);
if (rshader->input[i].name == TGSI_SEMANTIC_GENERIC &&
sprite_coord_enable & (1 << rshader->input[i].sid)) {
if (rshader->input[i].name == TGSI_SEMANTIC_PCOORD ||
(rshader->input[i].name == TGSI_SEMANTIC_TEXCOORD &&
sprite_coord_enable & (1 << rshader->input[i].sid))) {
tmp |= S_028644_PT_SPRITE_TEX(1);
}

5
src/gallium/drivers/r600/r600_state_common.c
View file

@ -956,7 +956,6 @@ static void *r600_create_shader_state(struct pipe_context *ctx,
case PIPE_SHADER_TESS_CTRL:
sel->lds_patch_outputs_written_mask = 0;
sel->lds_outputs_written_mask = 0;
bool texxcoord_semantic = ctx->screen->get_param(ctx->screen, PIPE_CAP_TGSI_TEXCOORD);
for (i = 0; i < sel->info.num_outputs; i++) {
unsigned name = sel->info.output_semantic_name[i];
@ -967,11 +966,11 @@ static void *r600_create_shader_state(struct pipe_context *ctx,
case TGSI_SEMANTIC_TESSOUTER:
case TGSI_SEMANTIC_PATCH:
sel->lds_patch_outputs_written_mask |=
1ull << r600_get_lds_unique_index(name, index, texxcoord_semantic);
1ull << r600_get_lds_unique_index(name, index);
break;
default:
sel->lds_outputs_written_mask |=
1ull << r600_get_lds_unique_index(name, index, texxcoord_semantic);
1ull << r600_get_lds_unique_index(name, index);
}
}
break;