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radeonsi: handle NULL return value from amdgpu_cs

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The next commits will make it possible that sctx->gfx_cs isn't
initialized so we can't assume anymore that amdgpu_cs() always
return a valid cs.

Reviewed-by: David Rosca <david.rosca@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41133>
This commit is contained in:
Pierre-Eric Pelloux-Prayer 2026-04-14 16:22:55 +02:00
parent 4dbdd4c0ee
commit d4c23daffc
2 changed files with 29 additions and 9 deletions
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29
src/gallium/winsys/amdgpu/drm/amdgpu_cs.cpp
View file

@ -255,7 +255,7 @@ amdgpu_cs_get_next_fence(struct radeon_cmdbuf *rcs)
struct amdgpu_cs *acs = amdgpu_cs(rcs);
struct pipe_fence_handle *fence = NULL;
if (acs->noop)
if (!acs || acs->noop)
return NULL;
if (acs->next_fence) {
@ -663,7 +663,12 @@ static unsigned amdgpu_cs_add_buffer(struct radeon_cmdbuf *rcs,
/* Don't use the "domains" parameter. Amdgpu doesn't support changing
* the buffer placement during command submission.
*/
struct amdgpu_cs_context *csc = amdgpu_csc_get_current(amdgpu_cs(rcs));
struct amdgpu_cs *acs = amdgpu_cs(rcs);
assert(acs);
if (!acs)
return 0;
struct amdgpu_cs_context *csc = amdgpu_csc_get_current(acs);
struct amdgpu_winsys_bo *bo = (struct amdgpu_winsys_bo*)buf;
struct amdgpu_cs_buffer *buffer;
@ -810,7 +815,7 @@ static void amdgpu_set_ib_size(struct radeon_cmdbuf *rcs, struct amdgpu_ib *ib)
*ib->ptr_ib_size = rcs->current.cdw | S_3F3_CHAIN(1) | S_3F3_VALID(1);
struct amdgpu_cs *acs = amdgpu_cs(rcs);
if (!rcs->gang && acs->preamble_ib_bo)
if (acs && !rcs->gang && acs->preamble_ib_bo)
*ib->ptr_ib_size |= S_3F3_PRE_ENA(1);
} else {
*ib->ptr_ib_size = rcs->current.cdw;
@ -896,7 +901,8 @@ static void amdgpu_destroy_cs_context(struct amdgpu_winsys *aws, struct amdgpu_c
static enum amd_ip_type amdgpu_cs_get_ip_type(struct radeon_cmdbuf *rcs)
{
struct amdgpu_cs *acs = amdgpu_cs(rcs);
return rcs->gang ? AMD_IP_COMPUTE : acs->ip_type;
assert(acs);
return (rcs->gang || !acs) ? AMD_IP_COMPUTE : acs->ip_type;
}
static bool ip_uses_alt_fence(enum amd_ip_type ip_type)
@ -1023,11 +1029,17 @@ amdgpu_cs_setup_preemption(struct radeon_cmdbuf *rcs, const uint32_t *preamble_i
unsigned preamble_num_dw)
{
struct amdgpu_cs *acs = amdgpu_cs(rcs);
struct amdgpu_winsys *aws = acs->aws;
unsigned size = align(preamble_num_dw * 4, aws->info.ip[AMD_IP_GFX].ib_alignment);
struct amdgpu_winsys *aws;
unsigned size;
struct pb_buffer_lean *preamble_bo;
uint32_t *map;
assert(acs);
if (!acs)
return false;
aws = acs->aws;
size = align(preamble_num_dw * 4, aws->info.ip[AMD_IP_GFX].ib_alignment);
/* Create the preamble IB buffer. */
preamble_bo = amdgpu_bo_create(aws, size, aws->info.ip[AMD_IP_GFX].ib_alignment,
RADEON_DOMAIN_VRAM,
@ -2407,8 +2419,11 @@ static void amdgpu_winsys_fence_reference(struct radeon_winsys *rws,
static bool amdgpu_cs_create_compute_gang(struct radeon_cmdbuf *rcs)
{
struct amdgpu_cs *acs = amdgpu_cs(rcs);
struct radeon_cmdbuf *gang;
if (!acs)
return false;
struct radeon_cmdbuf *gang = CALLOC_STRUCT(radeon_cmdbuf);
gang = CALLOC_STRUCT(radeon_cmdbuf);
if (!gang)
return false;

9
src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
View file

@ -249,8 +249,8 @@ amdgpu_lookup_buffer_any_type(struct amdgpu_cs_context *csc, struct amdgpu_winsy
static inline struct amdgpu_cs *
amdgpu_cs(struct radeon_cmdbuf *rcs)
{
/* acs can be NULL if rcs wasn't initialized. */
struct amdgpu_cs *acs = (struct amdgpu_cs*)rcs->priv;
assert(acs);
return acs;
}
@ -276,7 +276,12 @@ amdgpu_bo_is_referenced_by_cs_with_usage(struct amdgpu_cs *acs,
struct amdgpu_winsys_bo *bo,
unsigned usage)
{
struct amdgpu_cs_buffer *buffer = amdgpu_lookup_buffer_any_type(amdgpu_csc_get_current(acs), bo);
struct amdgpu_cs_buffer *buffer;
if (!acs)
return false;
buffer = amdgpu_lookup_buffer_any_type(amdgpu_csc_get_current(acs), bo);
return buffer && (buffer->usage & usage) != 0;
}