mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-06-04 06:38:19 +02:00
r300: get rid of user_src and ureg_dst
Just use the backend src/dst structs directly Assisted-by: Codex (GPT-5.5) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41577>
This commit is contained in:
Pavel Ondračka
Marge Bot
parent
a9a2256dc5
commit
d4a52c27ea
2 changed files with 108 additions and 124 deletions
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@ -3,6 +3,8 @@
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* SPDX-License-Identifier: MIT
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*/
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#include <stdio.h>
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#include "nir_to_rc.h"
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#include "compiler/nir/nir.h"
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#include "compiler/nir/nir_builder.h"
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@ -15,11 +17,8 @@
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#include "compiler/radeon_program_constants.h"
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#include "pipe/p_screen.h"
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#include "pipe/p_state.h"
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#include "tgsi/tgsi_dump.h"
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#include "tgsi/tgsi_info.h"
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#include "tgsi/tgsi_parse.h"
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#include "tgsi/tgsi_ureg.h"
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#include "tgsi/tgsi_util.h"
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#include "util/compiler.h"
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#include "util/u_debug.h"
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#include "util/u_dynarray.h"
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#include "util/u_math.h"
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@ -28,18 +27,7 @@
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#include "r300_screen.h"
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struct ntr_insn {
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rc_opcode opcode;
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struct ureg_dst dst[2];
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struct ureg_src src[4];
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/* Texture sampler unit is RC metadata, not a SrcReg[] operand. */
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struct ureg_src tex_sampler;
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rc_texture_target tex_target;
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struct tgsi_texture_offset tex_offset[4];
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unsigned mem_qualifier;
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enum pipe_format mem_format;
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bool is_tex : 1;
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struct rc_sub_instruction inst;
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bool precise : 1;
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};
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@ -129,15 +117,89 @@ ntr_block_from_nir(struct ntr_compile *c, struct nir_block *block)
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static void ntr_emit_cf_list(struct ntr_compile *c, struct exec_list *list);
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static void ntr_emit_cf_list_ureg(struct ntr_compile *c, struct exec_list *list);
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static rc_register_file
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ntr_rc_file_from_tgsi(unsigned file)
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{
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switch (file) {
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case TGSI_FILE_NULL: return RC_FILE_NONE;
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case TGSI_FILE_CONSTANT: return RC_FILE_CONSTANT;
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case TGSI_FILE_IMMEDIATE: return RC_FILE_CONSTANT;
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case TGSI_FILE_INPUT: return RC_FILE_INPUT;
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case TGSI_FILE_OUTPUT: return RC_FILE_OUTPUT;
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case TGSI_FILE_ADDRESS: return RC_FILE_ADDRESS;
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default:
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fprintf(stderr, "Unhandled register file: %i\n", file);
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FALLTHROUGH;
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case TGSI_FILE_TEMPORARY: return RC_FILE_TEMPORARY;
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}
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}
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static unsigned
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ntr_rc_register_index(struct ntr_compile *c, int index)
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{
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/* Negative offsets to relative addressing should have been lowered in NIR. */
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assert(index >= 0);
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if (index >= RC_REGISTER_MAX_INDEX)
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rc_error(c->compiler, "r300: Register index too high.\n");
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return index;
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}
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static struct rc_src_register
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ntr_rc_src_from_ureg(struct ntr_compile *c, struct ureg_src src)
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{
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int index = src.Index;
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if (src.File == TGSI_FILE_IMMEDIATE)
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index += c->immediate_offset;
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return (struct rc_src_register) {
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.File = ntr_rc_file_from_tgsi(src.File),
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.Index = ntr_rc_register_index(c, index),
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.RelAddr = src.Indirect,
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.Swizzle = RC_MAKE_SWIZZLE(src.SwizzleX, src.SwizzleY, src.SwizzleZ,
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src.SwizzleW),
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.Abs = src.Absolute,
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.Negate = src.Negate ? RC_MASK_XYZW : RC_MASK_NONE,
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};
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}
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static struct rc_dst_register
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ntr_rc_dst_from_ureg(struct ntr_compile *c, struct ureg_dst dst)
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{
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if (dst.Indirect)
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rc_error(c->compiler,
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"r300: Relative addressing of destination operands is unsupported.\n");
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return (struct rc_dst_register) {
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.File = ntr_rc_file_from_tgsi(dst.File),
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.Index = ntr_rc_register_index(c, dst.Index),
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.WriteMask = dst.WriteMask,
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};
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}
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static void
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ntr_rc_tex_sampler_from_ureg(struct ntr_compile *c, struct rc_sub_instruction *inst,
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struct ureg_src sampler)
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{
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assert(sampler.File == TGSI_FILE_SAMPLER);
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if (sampler.Indirect)
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rc_error(c->compiler,
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"r300: Relative addressing of sampler operands is unsupported.\n");
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inst->TexSrcUnit = ntr_rc_register_index(c, sampler.Index);
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}
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static struct ntr_insn *
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ntr_insn(struct ntr_compile *c, rc_opcode opcode, struct ureg_dst dst, struct ureg_src src0,
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struct ureg_src src1, struct ureg_src src2, struct ureg_src src3)
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struct ureg_src src1, struct ureg_src src2)
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{
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assert(rc_get_opcode_info(opcode)->NumSrcRegs <= 3);
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struct ntr_insn insn = {
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.opcode = opcode,
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.dst = {dst, ureg_dst_undef()},
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.src = {src0, src1, src2, src3},
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.tex_sampler = ureg_src_undef(),
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.inst = {
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.Opcode = opcode,
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.DstReg = ntr_rc_dst_from_ureg(c, dst),
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.SrcReg = {ntr_rc_src_from_ureg(c, src0), ntr_rc_src_from_ureg(c, src1),
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ntr_rc_src_from_ureg(c, src2)},
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.SaturateMode = dst.Saturate ? RC_SATURATE_ZERO_ONE : RC_SATURATE_NONE,
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},
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.precise = c->precise,
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};
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util_dynarray_append(&c->cur_block->insns, insn);
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@ -148,29 +210,27 @@ ntr_insn(struct ntr_compile *c, rc_opcode opcode, struct ureg_dst dst, struct ur
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static inline void ntr_##name(struct ntr_compile *c) \
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{ \
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ntr_insn(c, op, ureg_dst_undef(), ureg_src_undef(), ureg_src_undef(), \
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ureg_src_undef(), ureg_src_undef()); \
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ureg_src_undef()); \
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}
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#define NTR_OP01(name, op) \
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static inline void ntr_##name(struct ntr_compile *c, struct ureg_src src0) \
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{ \
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ntr_insn(c, op, ureg_dst_undef(), src0, ureg_src_undef(), ureg_src_undef(), \
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ureg_src_undef()); \
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ntr_insn(c, op, ureg_dst_undef(), src0, ureg_src_undef(), ureg_src_undef()); \
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}
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#define NTR_OP11(name, op) \
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static inline void ntr_##name(struct ntr_compile *c, struct ureg_dst dst, \
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struct ureg_src src0) \
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{ \
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ntr_insn(c, op, dst, src0, ureg_src_undef(), ureg_src_undef(), \
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ureg_src_undef()); \
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ntr_insn(c, op, dst, src0, ureg_src_undef(), ureg_src_undef()); \
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}
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#define NTR_OP12(name, op) \
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static inline void ntr_##name(struct ntr_compile *c, struct ureg_dst dst, \
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struct ureg_src src0, struct ureg_src src1) \
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{ \
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ntr_insn(c, op, dst, src0, src1, ureg_src_undef(), ureg_src_undef()); \
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ntr_insn(c, op, dst, src0, src1, ureg_src_undef()); \
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}
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#define NTR_OP13(name, op) \
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@ -178,7 +238,7 @@ ntr_insn(struct ntr_compile *c, rc_opcode opcode, struct ureg_dst dst, struct ur
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struct ureg_src src0, struct ureg_src src1, \
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struct ureg_src src2) \
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{ \
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ntr_insn(c, op, dst, src0, src1, src2, ureg_src_undef()); \
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ntr_insn(c, op, dst, src0, src1, src2); \
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}
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NTR_OP00(KILL, RC_OPCODE_KILP)
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@ -766,7 +826,7 @@ ntr_emit_scalar(struct ntr_compile *c, rc_opcode op, struct ureg_dst dst,
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for (i = 0; i < 4; i++) {
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if (dst.WriteMask & (1 << i)) {
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ntr_insn(c, op, ureg_writemask(dst, 1 << i), ureg_scalar(src0, i),
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ureg_scalar(src1, i), ureg_src_undef(), ureg_src_undef());
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ureg_scalar(src1, i), ureg_src_undef());
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}
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}
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}
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@ -817,7 +877,7 @@ ntr_emit_alu(struct ntr_compile *c, nir_alu_instr *instr)
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if (instr->op < ARRAY_SIZE(op_map) && op_map[instr->op] > 0) {
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/* The normal path for NIR to TGSI ALU op translation */
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ntr_insn(c, op_map[instr->op], dst, src[0], src[1], src[2], src[3]);
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ntr_insn(c, op_map[instr->op], dst, src[0], src[1], src[2]);
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} else {
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/* Special cases for NIR to TGSI ALU op translation. */
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@ -1144,7 +1204,7 @@ ntr_emit_intrinsic(struct ntr_compile *c, nir_intrinsic_instr *instr)
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}
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struct ntr_tex_operand_state {
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struct ureg_src srcs[4];
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struct ureg_src srcs[3];
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unsigned i;
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};
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@ -1225,26 +1285,14 @@ ntr_emit_texture(struct ntr_compile *c, nir_tex_instr *instr)
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s.srcs[s.i++] = ntr_get_src(c, instr->src[ddy].src);
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}
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while (s.i < 4)
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while (s.i < ARRAY_SIZE(s.srcs))
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s.srcs[s.i++] = ureg_src_undef();
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struct ntr_insn *insn =
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ntr_insn(c, tex_opcode, dst, s.srcs[0], s.srcs[1], s.srcs[2], s.srcs[3]);
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insn->tex_target = target;
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insn->tex_sampler = sampler;
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insn->is_tex = true;
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int tex_offset_src = nir_tex_instr_src_index(instr, nir_tex_src_offset);
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if (tex_offset_src >= 0) {
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struct ureg_src offset = ntr_get_src(c, instr->src[tex_offset_src].src);
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insn->tex_offset[0].File = offset.File;
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insn->tex_offset[0].Index = offset.Index;
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insn->tex_offset[0].SwizzleX = offset.SwizzleX;
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insn->tex_offset[0].SwizzleY = offset.SwizzleY;
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insn->tex_offset[0].SwizzleZ = offset.SwizzleZ;
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insn->tex_offset[0].Padding = 0;
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}
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ntr_insn(c, tex_opcode, dst, s.srcs[0], s.srcs[1], s.srcs[2]);
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insn->inst.TexSrcTarget = target;
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ntr_rc_tex_sampler_from_ureg(c, &insn->inst, sampler);
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insn->inst.TexSwizzle = RC_SWIZZLE_XYZW;
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}
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static void
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@ -1386,65 +1434,27 @@ ntr_emit_cf_list(struct ntr_compile *c, struct exec_list *list)
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}
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}
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static void
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ntr_translate_dst(struct ntr_compile *c, struct rc_dst_register *rc_dst,
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struct ureg_dst src)
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{
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rc_dst->File = rc_translate_register_file(src.File);
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rc_dst->Index = src.Index;
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rc_dst->WriteMask = src.WriteMask;
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if (src.Indirect)
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rc_error(c->compiler,
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"r300: Relative addressing of destination operands is unsupported.\n");
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}
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static void
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ntr_translate_src(struct ntr_compile *c, struct rc_src_register *rc_src,
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struct ureg_src src)
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{
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rc_src->File = rc_translate_register_file(src.File);
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int index = src.Index;
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if (src.File == TGSI_FILE_IMMEDIATE)
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index += c->immediate_offset;
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/* Negative offsets to relative addressing should have been lowered in NIR */
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assert(index >= 0);
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if (index >= RC_REGISTER_MAX_INDEX)
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rc_error(c->compiler, "r300: Register index too high.\n");
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rc_src->Index = index;
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rc_src->RelAddr = src.Indirect;
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rc_src->Swizzle = src.SwizzleX;
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rc_src->Swizzle |= src.SwizzleY << 3;
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rc_src->Swizzle |= src.SwizzleZ << 6;
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rc_src->Swizzle |= src.SwizzleW << 9;
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rc_src->Abs = src.Absolute;
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rc_src->Negate = src.Negate ? RC_MASK_XYZW : 0;
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}
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static void
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ntr_emit_block_rc(struct ntr_compile *c, struct nir_block *block)
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{
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struct ntr_block *ntr_block = ntr_block_from_nir(c, block);
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util_dynarray_foreach (&ntr_block->insns, struct ntr_insn, insn) {
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const struct rc_opcode_info *opcode_info = rc_get_opcode_info(insn->opcode);
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const struct rc_opcode_info *opcode_info = rc_get_opcode_info(insn->inst.Opcode);
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struct rc_instruction *rc_insn =
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rc_insert_new_instruction(c->compiler, c->compiler->Program.Instructions.Prev);
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rc_insn->U.I.Opcode = insn->opcode;
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rc_insn->U.I.Opcode = insn->inst.Opcode;
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if (opcode_info->HasDstReg) {
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rc_insn->U.I.SaturateMode = rc_translate_saturate(insn->dst[0].Saturate);
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ntr_translate_dst(c, &rc_insn->U.I.DstReg, insn->dst[0]);
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rc_insn->U.I.DstReg = insn->inst.DstReg;
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rc_insn->U.I.SaturateMode = insn->inst.SaturateMode;
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}
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for (unsigned i = 0; i < opcode_info->NumSrcRegs; i++)
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ntr_translate_src(c, &rc_insn->U.I.SrcReg[i], insn->src[i]);
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if (insn->is_tex) {
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assert(insn->tex_sampler.File == TGSI_FILE_SAMPLER);
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rc_insn->U.I.TexSrcUnit = insn->tex_sampler.Index;
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rc_insn->U.I.TexSrcTarget = insn->tex_target;
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rc_insn->U.I.TexSwizzle = RC_SWIZZLE_XYZW;
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rc_insn->U.I.SrcReg[i] = insn->inst.SrcReg[i];
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if (opcode_info->HasTexture) {
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rc_insn->U.I.TexSrcUnit = insn->inst.TexSrcUnit;
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rc_insn->U.I.TexSrcTarget = insn->inst.TexSrcTarget;
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rc_insn->U.I.TexSwizzle = insn->inst.TexSwizzle;
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}
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}
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}
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@ -1499,7 +1509,7 @@ ntr_add_constants(struct ntr_compile *c)
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constant.u.External = i;
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rc_constants_add(&c->compiler->Program.Constants, &constant);
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}
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c->immediate_offset = c->compiler->Program.Constants.Count;
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assert(c->compiler->Program.Constants.Count == c->immediate_offset);
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util_dynarray_foreach (&c->immediates, struct ntr_immediate, imm) {
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struct rc_constant constant;
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@ -1530,9 +1540,10 @@ ntr_emit_impl(struct ntr_compile *c, nir_function_impl *impl)
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ntr_setup_registers(c);
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c->cur_block = ntr_block_from_nir(c, nir_start_block(impl));
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ntr_setup_uniforms(c);
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c->immediate_offset = c->compiler->Program.Constants.Count + c->ubo_size;
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ntr_setup_inputs(c);
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ntr_setup_outputs(c);
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ntr_setup_uniforms(c);
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/* Emit the ntr insns */
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ntr_emit_cf_list(c, &impl->body);
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@ -7,7 +7,6 @@
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#define NIR_TO_RC_H
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#include <stdbool.h>
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#include <stdio.h>
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#include "compiler/nir/nir.h"
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#include "pipe/p_defines.h"
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#include "r300_fs.h"
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@ -15,8 +14,6 @@
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#include "r300_vs.h"
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#include "compiler/radeon_program_constants.h"
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#include "pipe/p_shader_tokens.h"
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#include "util/compiler.h"
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struct nir_shader;
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struct pipe_screen;
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@ -35,28 +32,4 @@ nir_to_rc(struct nir_shader *s, struct pipe_screen *screen,
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void
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ntr_fixup_varying_slots(struct nir_shader *s, nir_variable_mode mode);
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/* Helpers used for translating between TGSI and RC enums. */
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static inline unsigned
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rc_translate_register_file(unsigned tgsi_file)
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{
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switch (tgsi_file) {
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case TGSI_FILE_CONSTANT: return RC_FILE_CONSTANT;
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case TGSI_FILE_IMMEDIATE: return RC_FILE_CONSTANT;
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case TGSI_FILE_INPUT: return RC_FILE_INPUT;
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case TGSI_FILE_OUTPUT: return RC_FILE_OUTPUT;
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case TGSI_FILE_ADDRESS: return RC_FILE_ADDRESS;
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default:
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fprintf(stderr, "Unhandled register file: %i\n", tgsi_file);
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FALLTHROUGH;
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case TGSI_FILE_TEMPORARY: return RC_FILE_TEMPORARY;
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}
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}
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static inline unsigned
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rc_translate_saturate(bool saturate)
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{
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return saturate ? RC_SATURATE_ZERO_ONE : RC_SATURATE_NONE;
|
||||
}
|
||||
|
||||
#endif /* NIR_TO_RC_H */
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue