diff --git a/src/asahi/lib/agx_device.c b/src/asahi/lib/agx_device.c index 3c9ed903943..66dbf2b724e 100644 --- a/src/asahi/lib/agx_device.c +++ b/src/asahi/lib/agx_device.c @@ -887,25 +887,25 @@ agx_get_gpu_timestamp(struct agx_device *dev) void agx_get_device_uuid(const struct agx_device *dev, void *uuid) { - blake3_hasher sha1_ctx; - _mesa_blake3_init(&sha1_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); /* The device UUID uniquely identifies the given device within the machine. * Since we never have more than one device, this doesn't need to be a real * UUID, so we use SHA1("agx" + gpu_generation + gpu_variant + gpu_revision). */ static const char *device_name = "agx"; - _mesa_blake3_update(&sha1_ctx, device_name, strlen(device_name)); + _mesa_blake3_update(&blake3_ctx, device_name, strlen(device_name)); - _mesa_blake3_update(&sha1_ctx, &dev->params.gpu_generation, + _mesa_blake3_update(&blake3_ctx, &dev->params.gpu_generation, sizeof(dev->params.gpu_generation)); - _mesa_blake3_update(&sha1_ctx, &dev->params.gpu_variant, + _mesa_blake3_update(&blake3_ctx, &dev->params.gpu_variant, sizeof(dev->params.gpu_variant)); - _mesa_blake3_update(&sha1_ctx, &dev->params.gpu_revision, + _mesa_blake3_update(&blake3_ctx, &dev->params.gpu_revision, sizeof(dev->params.gpu_revision)); uint8_t sha1[BLAKE3_KEY_LEN]; - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); assert(BLAKE3_KEY_LEN >= UUID_SIZE); memcpy(uuid, sha1, UUID_SIZE); @@ -922,13 +922,13 @@ agx_get_driver_uuid(void *uuid) * driver. People who want to share memory need to also check the device * UUID. */ - blake3_hasher sha1_ctx; - _mesa_blake3_init(&sha1_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); - _mesa_blake3_update(&sha1_ctx, driver_id, strlen(driver_id)); + _mesa_blake3_update(&blake3_ctx, driver_id, strlen(driver_id)); uint8_t sha1[BLAKE3_KEY_LEN]; - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); assert(BLAKE3_KEY_LEN >= UUID_SIZE); memcpy(uuid, sha1, UUID_SIZE); diff --git a/src/asahi/vulkan/hk_physical_device.c b/src/asahi/vulkan/hk_physical_device.c index 434364ebdc9..9d2a999feca 100644 --- a/src/asahi/vulkan/hk_physical_device.c +++ b/src/asahi/vulkan/hk_physical_device.c @@ -1089,14 +1089,14 @@ hk_get_device_properties(const struct agx_device *dev, properties->identicalMemoryTypeRequirements = true; { - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; uint8_t sha1[BLAKE3_KEY_LEN]; - _mesa_blake3_init(&sha1_ctx); + _mesa_blake3_init(&blake3_ctx); /* Make sure we don't match with other vendors */ const char *driver = "honeykrisp-v1"; - _mesa_blake3_update(&sha1_ctx, driver, strlen(driver)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_update(&blake3_ctx, driver, strlen(driver)); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(properties->optimalTilingLayoutUUID, sha1, VK_UUID_SIZE); } @@ -1107,17 +1107,17 @@ hk_physical_device_init_pipeline_cache(struct hk_physical_device *pdev) { struct hk_instance *instance = hk_physical_device_instance(pdev); - blake3_hasher sha_ctx; - _mesa_blake3_init(&sha_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); - _mesa_blake3_update(&sha_ctx, instance->driver_build_sha, + _mesa_blake3_update(&blake3_ctx, instance->driver_build_sha, sizeof(instance->driver_build_sha)); const uint64_t compiler_flags = hk_physical_device_compiler_flags(pdev); - _mesa_blake3_update(&sha_ctx, &compiler_flags, sizeof(compiler_flags)); + _mesa_blake3_update(&blake3_ctx, &compiler_flags, sizeof(compiler_flags)); unsigned char sha[BLAKE3_KEY_LEN]; - _mesa_blake3_final(&sha_ctx, sha); + _mesa_blake3_final(&blake3_ctx, sha); static_assert(BLAKE3_KEY_LEN >= VK_UUID_SIZE); memcpy(pdev->vk.properties.pipelineCacheUUID, sha, VK_UUID_SIZE); diff --git a/src/broadcom/vulkan/v3dv_descriptor_set.c b/src/broadcom/vulkan/v3dv_descriptor_set.c index c76119af050..5cdfcd54b07 100644 --- a/src/broadcom/vulkan/v3dv_descriptor_set.c +++ b/src/broadcom/vulkan/v3dv_descriptor_set.c @@ -279,7 +279,7 @@ v3dv_descriptor_map_get_texture_shader_state(struct v3dv_device *device, #define BLAKE3_UPDATE_VALUE(ctx, x) _mesa_blake3_update(ctx, &(x), sizeof(x)); static void -sha1_update_ycbcr_conversion(blake3_hasher *ctx, +blake3_update_ycbcr_conversion(blake3_hasher *ctx, const struct vk_ycbcr_conversion_state *conversion) { BLAKE3_UPDATE_VALUE(ctx, conversion->format); @@ -291,7 +291,7 @@ sha1_update_ycbcr_conversion(blake3_hasher *ctx, } static void -sha1_update_descriptor_set_binding_layout(blake3_hasher *ctx, +blake3_update_descriptor_set_binding_layout(blake3_hasher *ctx, const struct v3dv_descriptor_set_binding_layout *layout, const struct v3dv_descriptor_set_layout *set_layout) { @@ -311,13 +311,13 @@ sha1_update_descriptor_set_binding_layout(blake3_hasher *ctx, for (unsigned i = 0; i < layout->array_size; i++) { const struct v3dv_sampler *sampler = &immutable_samplers[i]; if (sampler->conversion) - sha1_update_ycbcr_conversion(ctx, &sampler->conversion->state); + blake3_update_ycbcr_conversion(ctx, &sampler->conversion->state); } } } static void -sha1_update_descriptor_set_layout(blake3_hasher *ctx, +blake3_update_descriptor_set_layout(blake3_hasher *ctx, const struct v3dv_descriptor_set_layout *layout) { BLAKE3_UPDATE_VALUE(ctx, layout->flags); @@ -327,7 +327,7 @@ sha1_update_descriptor_set_layout(blake3_hasher *ctx, BLAKE3_UPDATE_VALUE(ctx, layout->dynamic_offset_count); for (uint16_t i = 0; i < layout->binding_count; i++) - sha1_update_descriptor_set_binding_layout(ctx, &layout->binding[i], layout); + blake3_update_descriptor_set_binding_layout(ctx, &layout->binding[i], layout); } @@ -387,7 +387,7 @@ v3dv_CreatePipelineLayout(VkDevice _device, blake3_hasher ctx; _mesa_blake3_init(&ctx); for (unsigned s = 0; s < layout->num_sets; s++) { - sha1_update_descriptor_set_layout(&ctx, layout->set[s].layout); + blake3_update_descriptor_set_layout(&ctx, layout->set[s].layout); _mesa_blake3_update(&ctx, &layout->set[s].dynamic_offset_start, sizeof(layout->set[s].dynamic_offset_start)); } diff --git a/src/broadcom/vulkan/v3dv_device.c b/src/broadcom/vulkan/v3dv_device.c index b6b19401b69..b6a009e2e40 100644 --- a/src/broadcom/vulkan/v3dv_device.c +++ b/src/broadcom/vulkan/v3dv_device.c @@ -817,17 +817,17 @@ init_uuids(struct v3dv_physical_device *device) uint32_t vendor_id = v3dv_physical_device_vendor_id(device); uint32_t device_id = v3dv_physical_device_device_id(device); - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; uint8_t sha1[BLAKE3_KEY_LEN]; STATIC_ASSERT(VK_UUID_SIZE <= sizeof(sha1)); /* The pipeline cache UUID is used for determining when a pipeline cache is * invalid. It needs both a driver build and the PCI ID of the device. */ - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, build_id_data(note), build_id_len); - _mesa_blake3_update(&sha1_ctx, &device_id, sizeof(device_id)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, build_id_data(note), build_id_len); + _mesa_blake3_update(&blake3_ctx, &device_id, sizeof(device_id)); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(device->pipeline_cache_uuid, sha1, VK_UUID_SIZE); /* The driver UUID is used for determining sharability of images and memory @@ -841,10 +841,10 @@ init_uuids(struct v3dv_physical_device *device) * Since we never have more than one device, this doesn't need to be a real * UUID. */ - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, &vendor_id, sizeof(vendor_id)); - _mesa_blake3_update(&sha1_ctx, &device_id, sizeof(device_id)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, &vendor_id, sizeof(vendor_id)); + _mesa_blake3_update(&blake3_ctx, &device_id, sizeof(device_id)); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(device->device_uuid, sha1, VK_UUID_SIZE); return VK_SUCCESS; diff --git a/src/broadcom/vulkan/v3dv_pipeline.c b/src/broadcom/vulkan/v3dv_pipeline.c index 1b7fbd53338..c5092dd1d42 100644 --- a/src/broadcom/vulkan/v3dv_pipeline.c +++ b/src/broadcom/vulkan/v3dv_pipeline.c @@ -47,7 +47,7 @@ static VkResult compute_vpm_config(struct v3dv_pipeline *pipeline); static void -pipeline_compute_sha1_from_nir(struct v3dv_pipeline_stage *p_stage) +pipeline_compute_blake3_from_nir(struct v3dv_pipeline_stage *p_stage) { VkPipelineShaderStageCreateInfo info = { .module = vk_shader_module_handle_from_nir(p_stage->nir), @@ -1515,7 +1515,7 @@ upload_assembly(struct v3dv_pipeline *pipeline) static void pipeline_hash_graphics(const struct v3dv_pipeline *pipeline, struct v3dv_pipeline_key *key, - unsigned char *sha1_out) + unsigned char *blake3_out) { blake3_hasher ctx; _mesa_blake3_init(&ctx); @@ -1544,13 +1544,13 @@ pipeline_hash_graphics(const struct v3dv_pipeline *pipeline, _mesa_blake3_update(&ctx, key, sizeof(struct v3dv_pipeline_key)); - _mesa_blake3_final(&ctx, sha1_out); + _mesa_blake3_final(&ctx, blake3_out); } static void pipeline_hash_compute(const struct v3dv_pipeline *pipeline, struct v3dv_pipeline_key *key, - unsigned char *sha1_out) + unsigned char *blake3_out) { blake3_hasher ctx; _mesa_blake3_init(&ctx); @@ -1567,7 +1567,7 @@ pipeline_hash_compute(const struct v3dv_pipeline *pipeline, _mesa_blake3_update(&ctx, key, sizeof(struct v3dv_pipeline_key)); - _mesa_blake3_final(&ctx, sha1_out); + _mesa_blake3_final(&ctx, blake3_out); } /* Checks that the pipeline has enough spill size to use for any of their @@ -2120,7 +2120,7 @@ pipeline_populate_compute_key(struct v3dv_pipeline *pipeline, } static struct v3dv_pipeline_shared_data * -v3dv_pipeline_shared_data_new_empty(const unsigned char sha1_key[BLAKE3_KEY_LEN], +v3dv_pipeline_shared_data_new_empty(const unsigned char blake3_key[BLAKE3_KEY_LEN], struct v3dv_pipeline *pipeline, bool is_graphics_pipeline) { @@ -2174,7 +2174,7 @@ v3dv_pipeline_shared_data_new_empty(const unsigned char sha1_key[BLAKE3_KEY_LEN] new_entry->maps[BROADCOM_SHADER_GEOMETRY]; new_entry->ref_cnt = 1; - memcpy(new_entry->sha1_key, sha1_key, BLAKE3_KEY_LEN); + memcpy(new_entry->blake3_key, blake3_key, BLAKE3_KEY_LEN); return new_entry; @@ -2377,7 +2377,7 @@ pipeline_add_multiview_gs(struct v3dv_pipeline *pipeline, p_stage->module = NULL; p_stage->module_info = NULL; p_stage->nir = nir; - pipeline_compute_sha1_from_nir(p_stage); + pipeline_compute_blake3_from_nir(p_stage); p_stage->program_id = p_atomic_inc_return(&physical_device->next_program_id); p_stage->robustness = pipeline->stages[BROADCOM_SHADER_VERTEX]->robustness; @@ -2515,7 +2515,7 @@ pipeline_compile_graphics(struct v3dv_pipeline *pipeline, p_stage->nir = b.shader; vk_pipeline_robustness_state_fill(&device->vk, &p_stage->robustness, NULL, NULL); - pipeline_compute_sha1_from_nir(p_stage); + pipeline_compute_blake3_from_nir(p_stage); p_stage->program_id = p_atomic_inc_return(&physical_device->next_program_id); diff --git a/src/broadcom/vulkan/v3dv_pipeline_cache.c b/src/broadcom/vulkan/v3dv_pipeline_cache.c index 0e3f210a002..e281fc39563 100644 --- a/src/broadcom/vulkan/v3dv_pipeline_cache.c +++ b/src/broadcom/vulkan/v3dv_pipeline_cache.c @@ -34,19 +34,19 @@ static const bool dump_stats_on_destroy = false; #define V3DV_MAX_PIPELINE_CACHE_ENTRIES 4096 static uint32_t -sha1_hash_func(const void *sha1) +blake3_hash_func(const void *sha1) { return _mesa_hash_data(sha1, BLAKE3_KEY_LEN); } static bool -sha1_compare_func(const void *sha1_a, const void *sha1_b) +blake3_compare_func(const void *blake3_a, const void *blake3_b) { - return memcmp(sha1_a, sha1_b, 20) == 0; + return memcmp(blake3_a, blake3_b, 20) == 0; } struct serialized_nir { - unsigned char sha1_key[BLAKE3_KEY_LEN]; + unsigned char blake3_key[BLAKE3_KEY_LEN]; size_t size; char data[0]; }; @@ -83,7 +83,7 @@ void v3dv_pipeline_cache_upload_nir(struct v3dv_pipeline *pipeline, struct v3dv_pipeline_cache *cache, nir_shader *nir, - unsigned char sha1_key[BLAKE3_KEY_LEN]) + unsigned char blake3_key[BLAKE3_KEY_LEN]) { if (!cache || !cache->nir_cache) return; @@ -93,7 +93,7 @@ v3dv_pipeline_cache_upload_nir(struct v3dv_pipeline *pipeline, pipeline_cache_lock(cache); struct hash_entry *entry = - _mesa_hash_table_search(cache->nir_cache, sha1_key); + _mesa_hash_table_search(cache->nir_cache, blake3_key); pipeline_cache_unlock(cache); if (entry) return; @@ -112,7 +112,7 @@ v3dv_pipeline_cache_upload_nir(struct v3dv_pipeline *pipeline, * lock. We could unlock for the big memcpy but it's probably not worth * the hassle. */ - entry = _mesa_hash_table_search(cache->nir_cache, sha1_key); + entry = _mesa_hash_table_search(cache->nir_cache, blake3_key); if (entry) { blob_finish(&blob); pipeline_cache_unlock(cache); @@ -121,7 +121,7 @@ v3dv_pipeline_cache_upload_nir(struct v3dv_pipeline *pipeline, struct serialized_nir *snir = ralloc_size(cache->nir_cache, sizeof(*snir) + blob.size); - memcpy(snir->sha1_key, sha1_key, BLAKE3_KEY_LEN); + memcpy(snir->blake3_key, blake3_key, BLAKE3_KEY_LEN); snir->size = blob.size; memcpy(snir->data, blob.data, blob.size); @@ -130,13 +130,13 @@ v3dv_pipeline_cache_upload_nir(struct v3dv_pipeline *pipeline, cache->nir_stats.count++; if (debug_cache) { char sha1buf[BLAKE3_HEX_LEN]; - _mesa_blake3_format(sha1buf, snir->sha1_key); + _mesa_blake3_format(sha1buf, snir->blake3_key); mesa_logi("pipeline cache %p, new nir entry %s\n", cache, sha1buf); if (dump_stats) cache_dump_stats(cache); } - _mesa_hash_table_insert(cache->nir_cache, snir->sha1_key, snir); + _mesa_hash_table_insert(cache->nir_cache, snir->blake3_key, snir); pipeline_cache_unlock(cache); } @@ -145,14 +145,14 @@ nir_shader* v3dv_pipeline_cache_search_for_nir(struct v3dv_pipeline *pipeline, struct v3dv_pipeline_cache *cache, const nir_shader_compiler_options *nir_options, - unsigned char sha1_key[BLAKE3_KEY_LEN]) + unsigned char blake3_key[BLAKE3_KEY_LEN]) { if (!cache || !cache->nir_cache) return NULL; if (debug_cache) { char sha1buf[BLAKE3_HEX_LEN]; - _mesa_blake3_format(sha1buf, sha1_key); + _mesa_blake3_format(sha1buf, blake3_key); mesa_logi("pipeline cache %p, search for nir %s\n", cache, sha1buf); } @@ -161,7 +161,7 @@ v3dv_pipeline_cache_search_for_nir(struct v3dv_pipeline *pipeline, pipeline_cache_lock(cache); struct hash_entry *entry = - _mesa_hash_table_search(cache->nir_cache, sha1_key); + _mesa_hash_table_search(cache->nir_cache, blake3_key); if (entry) snir = entry->data; pipeline_cache_unlock(cache); @@ -208,14 +208,14 @@ v3dv_pipeline_cache_init(struct v3dv_pipeline_cache *cache, mtx_init(&cache->mutex, mtx_plain); if (cache_enabled) { - cache->nir_cache = _mesa_hash_table_create(NULL, sha1_hash_func, - sha1_compare_func); + cache->nir_cache = _mesa_hash_table_create(NULL, blake3_hash_func, + blake3_compare_func); cache->nir_stats.miss = 0; cache->nir_stats.hit = 0; cache->nir_stats.count = 0; - cache->cache = _mesa_hash_table_create(NULL, sha1_hash_func, - sha1_compare_func); + cache->cache = _mesa_hash_table_create(NULL, blake3_hash_func, + blake3_compare_func); cache->stats.miss = 0; cache->stats.hit = 0; cache->stats.count = 0; @@ -249,7 +249,7 @@ v3dv_pipeline_shared_data_write_to_blob(const struct v3dv_pipeline_shared_data * */ struct v3dv_pipeline_shared_data * v3dv_pipeline_cache_search_for_pipeline(struct v3dv_pipeline_cache *cache, - unsigned char sha1_key[BLAKE3_KEY_LEN], + unsigned char blake3_key[BLAKE3_KEY_LEN], bool *cache_hit) { if (!cache || !cache->cache) @@ -257,7 +257,7 @@ v3dv_pipeline_cache_search_for_pipeline(struct v3dv_pipeline_cache *cache, if (debug_cache) { char sha1buf[BLAKE3_HEX_LEN]; - _mesa_blake3_format(sha1buf, sha1_key); + _mesa_blake3_format(sha1buf, blake3_key); mesa_logi("pipeline cache %p, search pipeline with key %s\n", cache, sha1buf); } @@ -265,7 +265,7 @@ v3dv_pipeline_cache_search_for_pipeline(struct v3dv_pipeline_cache *cache, pipeline_cache_lock(cache); struct hash_entry *entry = - _mesa_hash_table_search(cache->cache, sha1_key); + _mesa_hash_table_search(cache->cache, blake3_key); if (entry) { struct v3dv_pipeline_shared_data *cache_entry = @@ -307,7 +307,7 @@ v3dv_pipeline_cache_search_for_pipeline(struct v3dv_pipeline_cache *cache, */ if (disk_cache && device->instance->pipeline_cache_enabled) { cache_key cache_key; - disk_cache_compute_key(disk_cache, sha1_key, 20, cache_key); + disk_cache_compute_key(disk_cache, blake3_key, 20, cache_key); size_t buffer_size; uint8_t *buffer = disk_cache_get(disk_cache, cache_key, &buffer_size); @@ -370,7 +370,7 @@ v3dv_pipeline_shared_data_destroy(struct v3dv_device *device, static struct v3dv_pipeline_shared_data * v3dv_pipeline_shared_data_new(struct v3dv_pipeline_cache *cache, - const unsigned char sha1_key[BLAKE3_KEY_LEN], + const unsigned char blake3_key[BLAKE3_KEY_LEN], struct v3dv_descriptor_maps **maps, struct v3dv_shader_variant **variants, const uint64_t *total_assembly, @@ -390,7 +390,7 @@ v3dv_pipeline_shared_data_new(struct v3dv_pipeline_cache *cache, return NULL; new_entry->ref_cnt = 1; - memcpy(new_entry->sha1_key, sha1_key, BLAKE3_KEY_LEN); + memcpy(new_entry->blake3_key, blake3_key, BLAKE3_KEY_LEN); for (uint8_t stage = 0; stage < BROADCOM_SHADER_STAGES; stage++) { new_entry->maps[stage] = maps[stage]; @@ -441,7 +441,7 @@ pipeline_cache_upload_shared_data(struct v3dv_pipeline_cache *cache, * entry is not on the hash table */ if (!from_disk_cache) - entry = _mesa_hash_table_search(cache->cache, shared_data->sha1_key); + entry = _mesa_hash_table_search(cache->cache, shared_data->blake3_key); if (entry) { pipeline_cache_unlock(cache); @@ -449,11 +449,11 @@ pipeline_cache_upload_shared_data(struct v3dv_pipeline_cache *cache, } v3dv_pipeline_shared_data_ref(shared_data); - _mesa_hash_table_insert(cache->cache, shared_data->sha1_key, shared_data); + _mesa_hash_table_insert(cache->cache, shared_data->blake3_key, shared_data); cache->stats.count++; if (debug_cache) { char sha1buf[BLAKE3_HEX_LEN]; - _mesa_blake3_format(sha1buf, shared_data->sha1_key); + _mesa_blake3_format(sha1buf, shared_data->blake3_key); mesa_logi("pipeline cache %p, new cache entry with sha1 key %s:%p\n\n", cache, sha1buf, shared_data); @@ -477,11 +477,11 @@ pipeline_cache_upload_shared_data(struct v3dv_pipeline_cache *cache, blob_init(&binary); if (v3dv_pipeline_shared_data_write_to_blob(shared_data, &binary)) { cache_key cache_key; - disk_cache_compute_key(disk_cache, shared_data->sha1_key, 20, cache_key); + disk_cache_compute_key(disk_cache, shared_data->blake3_key, 20, cache_key); if (V3D_DBG(CACHE)) { char sha1buf[BLAKE3_HEX_LEN]; - _mesa_blake3_format(sha1buf, shared_data->sha1_key); + _mesa_blake3_format(sha1buf, shared_data->blake3_key); mesa_logi("[v3dv on-disk cache] storing %s\n", sha1buf); } disk_cache_put(disk_cache, cache_key, binary.data, binary.size, NULL); @@ -504,7 +504,7 @@ static struct serialized_nir* serialized_nir_create_from_blob(struct v3dv_pipeline_cache *cache, struct blob_reader *blob) { - const unsigned char *sha1_key = blob_read_bytes(blob, BLAKE3_KEY_LEN); + const unsigned char *blake3_key = blob_read_bytes(blob, BLAKE3_KEY_LEN); uint32_t snir_size = blob_read_uint32(blob); const char* snir_data = blob_read_bytes(blob, snir_size); if (blob->overrun) @@ -512,7 +512,7 @@ serialized_nir_create_from_blob(struct v3dv_pipeline_cache *cache, struct serialized_nir *snir = ralloc_size(cache->nir_cache, sizeof(*snir) + snir_size); - memcpy(snir->sha1_key, sha1_key, BLAKE3_KEY_LEN); + memcpy(snir->blake3_key, blake3_key, BLAKE3_KEY_LEN); snir->size = snir_size; memcpy(snir->data, snir_data, snir_size); @@ -574,7 +574,7 @@ static struct v3dv_pipeline_shared_data * v3dv_pipeline_shared_data_create_from_blob(struct v3dv_pipeline_cache *cache, struct blob_reader *blob) { - const unsigned char *sha1_key = blob_read_bytes(blob, BLAKE3_KEY_LEN); + const unsigned char *blake3_key = blob_read_bytes(blob, BLAKE3_KEY_LEN); struct v3dv_descriptor_maps *maps[BROADCOM_SHADER_STAGES] = { 0 }; struct v3dv_shader_variant *variants[BROADCOM_SHADER_STAGES] = { 0 }; @@ -621,7 +621,7 @@ v3dv_pipeline_shared_data_create_from_blob(struct v3dv_pipeline_cache *cache, goto fail; struct v3dv_pipeline_shared_data *data = - v3dv_pipeline_shared_data_new(cache, sha1_key, maps, variants, + v3dv_pipeline_shared_data_new(cache, blake3_key, maps, variants, total_assembly, total_assembly_size); if (!data) @@ -680,7 +680,7 @@ pipeline_cache_load(struct v3dv_pipeline_cache *cache, if (!snir) break; - _mesa_hash_table_insert(cache->nir_cache, snir->sha1_key, snir); + _mesa_hash_table_insert(cache->nir_cache, snir->blake3_key, snir); cache->nir_stats.count++; } @@ -694,7 +694,7 @@ pipeline_cache_load(struct v3dv_pipeline_cache *cache, if (!cache_entry) break; - _mesa_hash_table_insert(cache->cache, cache_entry->sha1_key, cache_entry); + _mesa_hash_table_insert(cache->cache, cache_entry->blake3_key, cache_entry); cache->stats.count++; } @@ -800,7 +800,7 @@ v3dv_MergePipelineCaches(VkDevice device, struct serialized_nir *src_snir = entry->data; assert(src_snir); - if (_mesa_hash_table_search(dst->nir_cache, src_snir->sha1_key)) + if (_mesa_hash_table_search(dst->nir_cache, src_snir->blake3_key)) continue; /* FIXME: we are using serialized nir shaders because they are @@ -811,15 +811,15 @@ v3dv_MergePipelineCaches(VkDevice device, */ struct serialized_nir *snir_dst = ralloc_size(dst->nir_cache, sizeof(*snir_dst) + src_snir->size); - memcpy(snir_dst->sha1_key, src_snir->sha1_key, BLAKE3_KEY_LEN); + memcpy(snir_dst->blake3_key, src_snir->blake3_key, BLAKE3_KEY_LEN); snir_dst->size = src_snir->size; memcpy(snir_dst->data, src_snir->data, src_snir->size); - _mesa_hash_table_insert(dst->nir_cache, snir_dst->sha1_key, snir_dst); + _mesa_hash_table_insert(dst->nir_cache, snir_dst->blake3_key, snir_dst); dst->nir_stats.count++; if (debug_cache) { char sha1buf[BLAKE3_HEX_LEN]; - _mesa_blake3_format(sha1buf, snir_dst->sha1_key); + _mesa_blake3_format(sha1buf, snir_dst->blake3_key); mesa_logi("pipeline cache %p, added nir entry %s " "from pipeline cache %p\n", @@ -833,16 +833,16 @@ v3dv_MergePipelineCaches(VkDevice device, struct v3dv_pipeline_shared_data *cache_entry = entry->data; assert(cache_entry); - if (_mesa_hash_table_search(dst->cache, cache_entry->sha1_key)) + if (_mesa_hash_table_search(dst->cache, cache_entry->blake3_key)) continue; v3dv_pipeline_shared_data_ref(cache_entry); - _mesa_hash_table_insert(dst->cache, cache_entry->sha1_key, cache_entry); + _mesa_hash_table_insert(dst->cache, cache_entry->blake3_key, cache_entry); dst->stats.count++; if (debug_cache) { char sha1buf[BLAKE3_HEX_LEN]; - _mesa_blake3_format(sha1buf, cache_entry->sha1_key); + _mesa_blake3_format(sha1buf, cache_entry->blake3_key); mesa_logi("pipeline cache %p, added entry %s " "from pipeline cache %p\n", @@ -880,7 +880,7 @@ static bool v3dv_pipeline_shared_data_write_to_blob(const struct v3dv_pipeline_shared_data *cache_entry, struct blob *blob) { - blob_write_bytes(blob, cache_entry->sha1_key, BLAKE3_KEY_LEN); + blob_write_bytes(blob, cache_entry->blake3_key, BLAKE3_KEY_LEN); uint8_t descriptor_maps_count = 0; for (uint8_t stage = 0; stage < BROADCOM_SHADER_STAGES; stage++) { @@ -988,7 +988,7 @@ v3dv_GetPipelineCacheData(VkDevice _device, size_t save_size = blob.size; - blob_write_bytes(&blob, snir->sha1_key, BLAKE3_KEY_LEN); + blob_write_bytes(&blob, snir->blake3_key, BLAKE3_KEY_LEN); blob_write_uint32(&blob, snir->size); blob_write_bytes(&blob, snir->data, snir->size); diff --git a/src/broadcom/vulkan/v3dv_private.h b/src/broadcom/vulkan/v3dv_private.h index 770a87612e1..19fb628f07b 100644 --- a/src/broadcom/vulkan/v3dv_private.h +++ b/src/broadcom/vulkan/v3dv_private.h @@ -2198,7 +2198,7 @@ struct v3dv_descriptor_maps { struct v3dv_pipeline_shared_data { uint32_t ref_cnt; - unsigned char sha1_key[BLAKE3_KEY_LEN]; + unsigned char blake3_key[BLAKE3_KEY_LEN]; struct v3dv_descriptor_maps *maps[BROADCOM_SHADER_STAGES]; struct v3dv_shader_variant *variants[BROADCOM_SHADER_STAGES]; @@ -2487,16 +2487,16 @@ void v3dv_pipeline_cache_finish(struct v3dv_pipeline_cache *cache); void v3dv_pipeline_cache_upload_nir(struct v3dv_pipeline *pipeline, struct v3dv_pipeline_cache *cache, nir_shader *nir, - unsigned char sha1_key[BLAKE3_KEY_LEN]); + unsigned char blake3_key[BLAKE3_KEY_LEN]); nir_shader* v3dv_pipeline_cache_search_for_nir(struct v3dv_pipeline *pipeline, struct v3dv_pipeline_cache *cache, const nir_shader_compiler_options *nir_options, - unsigned char sha1_key[BLAKE3_KEY_LEN]); + unsigned char blake3_key[BLAKE3_KEY_LEN]); struct v3dv_pipeline_shared_data * v3dv_pipeline_cache_search_for_pipeline(struct v3dv_pipeline_cache *cache, - unsigned char sha1_key[BLAKE3_KEY_LEN], + unsigned char blake3_key[BLAKE3_KEY_LEN], bool *cache_hit); void diff --git a/src/broadcom/vulkan/v3dv_query.c b/src/broadcom/vulkan/v3dv_query.c index fb836d53553..910bed39ca3 100644 --- a/src/broadcom/vulkan/v3dv_query.c +++ b/src/broadcom/vulkan/v3dv_query.c @@ -1376,10 +1376,10 @@ v3dv_EnumeratePhysicalDeviceQueueFamilyPerformanceQueryCountersKHR( counter->scope = VK_PERFORMANCE_COUNTER_SCOPE_COMMAND_KHR; counter->storage = VK_PERFORMANCE_COUNTER_STORAGE_UINT64_KHR; - unsigned char sha1_result[BLAKE3_KEY_LEN]; - _mesa_blake3_compute(perfcntr_desc->name, strlen(perfcntr_desc->name), sha1_result); + unsigned char blake3_result[BLAKE3_KEY_LEN]; + _mesa_blake3_compute(perfcntr_desc->name, strlen(perfcntr_desc->name), blake3_result); - memcpy(counter->uuid, sha1_result, sizeof(counter->uuid)); + memcpy(counter->uuid, blake3_result, sizeof(counter->uuid)); } vk_outarray_append_typed(VkPerformanceCounterDescriptionKHR, diff --git a/src/compiler/glsl/gl_nir_linker.c b/src/compiler/glsl/gl_nir_linker.c index 3eb769f2eb4..10f9b8ee8e7 100644 --- a/src/compiler/glsl/gl_nir_linker.c +++ b/src/compiler/glsl/gl_nir_linker.c @@ -811,15 +811,15 @@ add_shader_variable(const struct gl_constants *consts, * type, a single entry will be generated, using the variable name * from the shader source." */ - struct gl_shader_variable *sha_v = + struct gl_shader_variable *blake3_v = create_shader_variable(shProg, var, name, type, interface_type, use_implicit_location, location, outermost_struct_type); - if (!sha_v) + if (!blake3_v) return false; return link_util_add_program_resource(shProg, resource_set, - programInterface, sha_v, stage_mask); + programInterface, blake3_v, stage_mask); } } } diff --git a/src/compiler/glsl/glsl_parser_extras.cpp b/src/compiler/glsl/glsl_parser_extras.cpp index 3d31c91bdb4..e67b3f2522d 100644 --- a/src/compiler/glsl/glsl_parser_extras.cpp +++ b/src/compiler/glsl/glsl_parser_extras.cpp @@ -2544,11 +2544,11 @@ _mesa_glsl_compile_shader(struct gl_context *ctx, struct gl_shader *shader, ralloc_free(state); if (ctx->Cache && shader->CompileStatus == COMPILE_SUCCESS) { - char sha1_buf[BLAKE3_HEX_LEN]; + char blake3_buf[BLAKE3_HEX_LEN]; disk_cache_put_key(ctx->Cache, shader->disk_cache_sha1); if (ctx->_Shader->Flags & GLSL_CACHE_INFO) { - _mesa_blake3_format(sha1_buf, shader->disk_cache_sha1); - fprintf(stderr, "marking shader: %s\n", sha1_buf); + _mesa_blake3_format(blake3_buf, shader->disk_cache_sha1); + fprintf(stderr, "marking shader: %s\n", blake3_buf); } } } diff --git a/src/compiler/glsl/shader_cache.cpp b/src/compiler/glsl/shader_cache.cpp index c81b53becbb..def1570d608 100644 --- a/src/compiler/glsl/shader_cache.cpp +++ b/src/compiler/glsl/shader_cache.cpp @@ -128,10 +128,10 @@ shader_cache_write_program_metadata(struct gl_context *ctx, disk_cache_put(cache, prog->data->sha1, metadata.data, metadata.size, &cache_item_metadata); - char sha1_buf[BLAKE3_HEX_LEN]; + char blake3_buf[BLAKE3_HEX_LEN]; if (ctx->_Shader->Flags & GLSL_CACHE_INFO) { - _mesa_blake3_format(sha1_buf, prog->data->sha1); - fprintf(stderr, "putting program metadata in cache: %s\n", sha1_buf); + _mesa_blake3_format(blake3_buf, prog->data->sha1); + fprintf(stderr, "putting program metadata in cache: %s\n", blake3_buf); } fail: diff --git a/src/freedreno/common/freedreno_uuid.c b/src/freedreno/common/freedreno_uuid.c index 599612e8197..17829e809bc 100644 --- a/src/freedreno/common/freedreno_uuid.c +++ b/src/freedreno/common/freedreno_uuid.c @@ -27,13 +27,13 @@ fd_get_driver_uuid(void *uuid) * driver. People who want to share memory need to also check the device * UUID. */ - blake3_hasher sha1_ctx; - _mesa_blake3_init(&sha1_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); - _mesa_blake3_update(&sha1_ctx, driver_id, strlen(driver_id)); + _mesa_blake3_update(&blake3_ctx, driver_id, strlen(driver_id)); uint8_t sha1[BLAKE3_KEY_LEN]; - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); assert(BLAKE3_KEY_LEN >= UUID_SIZE); memcpy(uuid, sha1, UUID_SIZE); @@ -42,8 +42,8 @@ fd_get_driver_uuid(void *uuid) void fd_get_device_uuid(void *uuid, const struct fd_dev_id *id) { - blake3_hasher sha1_ctx; - _mesa_blake3_init(&sha1_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); /* The device UUID uniquely identifies the given device within the machine. * Since we never have more than one device, this doesn't need to be a real @@ -64,12 +64,12 @@ fd_get_device_uuid(void *uuid, const struct fd_dev_id *id) */ static const char *device_name = "freedreno"; - _mesa_blake3_update(&sha1_ctx, device_name, strlen(device_name)); + _mesa_blake3_update(&blake3_ctx, device_name, strlen(device_name)); - _mesa_blake3_update(&sha1_ctx, id, sizeof(*id)); + _mesa_blake3_update(&blake3_ctx, id, sizeof(*id)); uint8_t sha1[BLAKE3_KEY_LEN]; - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); assert(BLAKE3_KEY_LEN >= UUID_SIZE); memcpy(uuid, sha1, UUID_SIZE); diff --git a/src/freedreno/ir3/ir3_shader.c b/src/freedreno/ir3/ir3_shader.c index 529f63e05ec..b2b27c40eb6 100644 --- a/src/freedreno/ir3/ir3_shader.c +++ b/src/freedreno/ir3/ir3_shader.c @@ -406,13 +406,13 @@ assemble_variant(struct ir3_shader_variant *v, bool internal) _mesa_blake3_update(&ctx, &v->info.double_threadsize, sizeof(v->info.double_threadsize)); _mesa_blake3_final(&ctx, sha1); - _mesa_blake3_format(v->sha1_str, sha1); + _mesa_blake3_format(v->blake3_str, sha1); bool dbg_enabled = shader_debug_enabled(v->type, internal) || ir3_shader_bisect_disasm_select(v); if (dbg_enabled || ir3_shader_override_path || v->disasm_info.write_disasm) { bool shader_overridden = - ir3_shader_override_path && try_override_shader_variant(v, v->sha1_str); + ir3_shader_override_path && try_override_shader_variant(v, v->blake3_str); if (v->disasm_info.write_disasm) { char *stream_data = NULL; @@ -422,7 +422,7 @@ assemble_variant(struct ir3_shader_variant *v, bool internal) fprintf(stream, "Native code%s for unnamed %s shader %s with sha1 %s:\n", shader_overridden ? " (overridden)" : "", ir3_shader_stage(v), - v->name, v->sha1_str); + v->name, v->blake3_str); ir3_shader_disasm(v, v->bin, stream); fclose(stream); @@ -441,7 +441,7 @@ assemble_variant(struct ir3_shader_variant *v, bool internal) fprintf(stream, "Native code%s for unnamed %s shader %s with sha1 %s:\n", shader_overridden ? " (overridden)" : "", ir3_shader_stage(v), - v->name, v->sha1_str); + v->name, v->blake3_str); if (v->type == MESA_SHADER_FRAGMENT) fprintf(stream, "SIMD0\n"); ir3_shader_disasm(v, v->bin, stream); diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h index 249ccb2af75..5c3026f4845 100644 --- a/src/freedreno/ir3/ir3_shader.h +++ b/src/freedreno/ir3/ir3_shader.h @@ -704,7 +704,7 @@ struct ir3_shader_variant { struct ir3_info info; - char sha1_str[BLAKE3_HEX_LEN]; + char blake3_str[BLAKE3_HEX_LEN]; struct ir3_shader_options shader_options; diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc index 7e5b8567d3c..d491e547de1 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.cc +++ b/src/freedreno/vulkan/tu_cmd_buffer.cc @@ -9291,7 +9291,7 @@ tu_dispatch(struct tu_cmd_buffer *cmd, if (info->indirect) { trace_start_compute_indirect(&cmd->trace, cs, cmd, info->unaligned, - (char *)shader->variant->sha1_str); + (char *)shader->variant->blake3_str); if (info->unaligned) { tu_cs_emit_pkt7(cs, CP_RUN_OPENCL, 1); @@ -9316,7 +9316,7 @@ tu_dispatch(struct tu_cmd_buffer *cmd, trace_start_compute(&cmd->trace, cs, cmd, info->indirect != 0, info->unaligned, local_size[0], local_size[1], local_size[2], info->blocks[0], info->blocks[1], - info->blocks[2], (char *)shader->variant->sha1_str); + info->blocks[2], (char *)shader->variant->blake3_str); if (info->unaligned) { tu_cs_emit_pkt7(cs, CP_EXEC_CS, 4); diff --git a/src/freedreno/vulkan/tu_cmd_buffer.h b/src/freedreno/vulkan/tu_cmd_buffer.h index 7c3cd9b9198..e695fbcae95 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.h +++ b/src/freedreno/vulkan/tu_cmd_buffer.h @@ -442,7 +442,7 @@ enum tu_suspend_resume_state SR_IN_CHAIN_AFTER_PRE_CHAIN, }; -typedef char tu_sha1_str[BLAKE3_HEX_LEN]; +typedef char tu_blake3_str[BLAKE3_HEX_LEN]; struct tu_cmd_state { diff --git a/src/freedreno/vulkan/tu_descriptor_set.cc b/src/freedreno/vulkan/tu_descriptor_set.cc index 25905e40510..bebd4625515 100644 --- a/src/freedreno/vulkan/tu_descriptor_set.cc +++ b/src/freedreno/vulkan/tu_descriptor_set.cc @@ -454,7 +454,7 @@ tu_GetDescriptorSetLayoutBindingOffsetEXT( #define BLAKE3_UPDATE_VALUE(ctx, x) _mesa_blake3_update(ctx, &(x), sizeof(x)); static void -sha1_update_ycbcr_sampler(blake3_hasher *ctx, +blake3_update_ycbcr_sampler(blake3_hasher *ctx, const struct vk_ycbcr_conversion_state *sampler) { BLAKE3_UPDATE_VALUE(ctx, sampler->ycbcr_model); @@ -463,7 +463,7 @@ sha1_update_ycbcr_sampler(blake3_hasher *ctx, } static void -sha1_update_descriptor_set_binding_layout(blake3_hasher *ctx, +blake3_update_descriptor_set_binding_layout(blake3_hasher *ctx, const struct tu_descriptor_set_binding_layout *layout, const struct tu_descriptor_set_layout *set_layout) { @@ -482,7 +482,7 @@ sha1_update_descriptor_set_binding_layout(blake3_hasher *ctx, if (ycbcr_samplers) { for (unsigned i = 0; i < layout->array_size; i++) - sha1_update_ycbcr_sampler(ctx, ycbcr_samplers + i); + blake3_update_ycbcr_sampler(ctx, ycbcr_samplers + i); } if (samplers) { @@ -498,13 +498,13 @@ sha1_update_descriptor_set_binding_layout(blake3_hasher *ctx, static void -sha1_update_descriptor_set_layout(blake3_hasher *ctx, +blake3_update_descriptor_set_layout(blake3_hasher *ctx, const struct tu_descriptor_set_layout *layout) { BLAKE3_UPDATE_VALUE(ctx, layout->has_variable_descriptors); for (uint16_t i = 0; i < layout->binding_count; i++) - sha1_update_descriptor_set_binding_layout(ctx, &layout->binding[i], + blake3_update_descriptor_set_binding_layout(ctx, &layout->binding[i], layout); } @@ -520,7 +520,7 @@ tu_pipeline_layout_init(struct tu_pipeline_layout *layout) _mesa_blake3_init(&ctx); for (unsigned s = 0; s < layout->num_sets; s++) { if (layout->set[s].layout) - sha1_update_descriptor_set_layout(&ctx, layout->set[s].layout); + blake3_update_descriptor_set_layout(&ctx, layout->set[s].layout); } _mesa_blake3_update(&ctx, &layout->num_sets, sizeof(layout->num_sets)); _mesa_blake3_update(&ctx, &layout->push_constant_size, diff --git a/src/freedreno/vulkan/tu_device.cc b/src/freedreno/vulkan/tu_device.cc index 2e7341b3730..9a40b459405 100644 --- a/src/freedreno/vulkan/tu_device.cc +++ b/src/freedreno/vulkan/tu_device.cc @@ -1496,24 +1496,24 @@ tu_get_properties(struct tu_physical_device *pdevice, props->identicalMemoryTypeRequirements = true; { - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; uint8_t sha1[BLAKE3_KEY_LEN]; - _mesa_blake3_init(&sha1_ctx); + _mesa_blake3_init(&blake3_ctx); /* Make sure we don't match with other vendors */ const char *driver = "turnip-v1"; - _mesa_blake3_update(&sha1_ctx, driver, strlen(driver)); + _mesa_blake3_update(&blake3_ctx, driver, strlen(driver)); /* Hash in UBWC configuration */ - _mesa_blake3_update(&sha1_ctx, &pdevice->ubwc_config.highest_bank_bit, + _mesa_blake3_update(&blake3_ctx, &pdevice->ubwc_config.highest_bank_bit, sizeof(pdevice->ubwc_config.highest_bank_bit)); - _mesa_blake3_update(&sha1_ctx, &pdevice->ubwc_config.bank_swizzle_levels, + _mesa_blake3_update(&blake3_ctx, &pdevice->ubwc_config.bank_swizzle_levels, sizeof(pdevice->ubwc_config.bank_swizzle_levels)); - _mesa_blake3_update(&sha1_ctx, &pdevice->ubwc_config.macrotile_mode, + _mesa_blake3_update(&blake3_ctx, &pdevice->ubwc_config.macrotile_mode, sizeof(pdevice->ubwc_config.macrotile_mode)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(props->optimalTilingLayoutUUID, sha1, VK_UUID_SIZE); } diff --git a/src/freedreno/vulkan/tu_pipeline.cc b/src/freedreno/vulkan/tu_pipeline.cc index e24c48df5a3..80982b22d85 100644 --- a/src/freedreno/vulkan/tu_pipeline.cc +++ b/src/freedreno/vulkan/tu_pipeline.cc @@ -2336,8 +2336,8 @@ tu_emit_program_state(struct tu_cs *sub_cs, } if (variants[stage]) { - memcpy(prog->stage_sha1[stage], variants[stage]->sha1_str, - sizeof(variants[stage]->sha1_str)); + memcpy(prog->stage_sha1[stage], variants[stage]->blake3_str, + sizeof(variants[stage]->blake3_str)); } } } diff --git a/src/freedreno/vulkan/tu_query_pool.cc b/src/freedreno/vulkan/tu_query_pool.cc index 936bf41a57f..d580a8945cb 100644 --- a/src/freedreno/vulkan/tu_query_pool.cc +++ b/src/freedreno/vulkan/tu_query_pool.cc @@ -2224,11 +2224,11 @@ tu_EnumeratePhysicalDeviceQueueFamilyPerformanceQueryCountersKHR( counter->storage = fd_perfcntr_type_to_vk_storage[group[i].countables[j].query_type]; - unsigned char sha1_result[BLAKE3_KEY_LEN]; + unsigned char blake3_result[BLAKE3_KEY_LEN]; _mesa_blake3_compute(group[i].countables[j].name, strlen(group[i].countables[j].name), - sha1_result); - memcpy(counter->uuid, sha1_result, sizeof(counter->uuid)); + blake3_result); + memcpy(counter->uuid, blake3_result, sizeof(counter->uuid)); } vk_outarray_append_typed(VkPerformanceCounterDescriptionKHR, &out_desc, desc) { @@ -2256,10 +2256,10 @@ tu_EnumeratePhysicalDeviceQueueFamilyPerformanceQueryCountersKHR( counter->unit = fd_perfcntr_type_to_vk_unit[derived_counter->type]; counter->storage = fd_perfcntr_type_to_vk_storage[derived_counter->type]; - unsigned char sha1_result[BLAKE3_KEY_LEN]; + unsigned char blake3_result[BLAKE3_KEY_LEN]; _mesa_blake3_compute(derived_counter->name, strlen(derived_counter->name), - sha1_result); - memcpy(counter->uuid, sha1_result, sizeof(counter->uuid)); + blake3_result); + memcpy(counter->uuid, blake3_result, sizeof(counter->uuid)); } vk_outarray_append_typed(VkPerformanceCounterDescriptionKHR, &out_desc, desc) { diff --git a/src/gallium/auxiliary/draw/draw_context.c b/src/gallium/auxiliary/draw/draw_context.c index 22f6a915129..6bd9f58a1d1 100644 --- a/src/gallium/auxiliary/draw/draw_context.c +++ b/src/gallium/auxiliary/draw/draw_context.c @@ -1276,10 +1276,10 @@ draw_set_disk_cache_callbacks(struct draw_context *draw, void *data_cookie, void (*find_shader)(void *cookie, struct lp_cached_code *cache, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]), + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]), void (*insert_shader)(void *cookie, struct lp_cached_code *cache, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN])) + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN])) { draw->disk_cache_find_shader = find_shader; draw->disk_cache_insert_shader = insert_shader; diff --git a/src/gallium/auxiliary/draw/draw_context.h b/src/gallium/auxiliary/draw/draw_context.h index a78f713658d..ff25916db4c 100644 --- a/src/gallium/auxiliary/draw/draw_context.h +++ b/src/gallium/auxiliary/draw/draw_context.h @@ -423,10 +423,10 @@ draw_set_disk_cache_callbacks(struct draw_context *draw, void *data_cookie, void (*find_shader)(void *cookie, struct lp_cached_code *cache, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]), + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]), void (*insert_shader)(void *cookie, struct lp_cached_code *cache, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN])); + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN])); #endif /* DRAW_CONTEXT_H */ diff --git a/src/gallium/auxiliary/draw/draw_llvm.c b/src/gallium/auxiliary/draw/draw_llvm.c index 825722b1bde..c1f3331a14b 100644 --- a/src/gallium/auxiliary/draw/draw_llvm.c +++ b/src/gallium/auxiliary/draw/draw_llvm.c @@ -442,7 +442,7 @@ static void draw_get_ir_cache_key(struct nir_shader *nir, const void *key, size_t key_size, uint32_t val_32bit, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]) + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]) { struct blob blob = { 0 }; unsigned ir_size; @@ -458,7 +458,7 @@ draw_get_ir_cache_key(struct nir_shader *nir, _mesa_blake3_update(&ctx, key, key_size); _mesa_blake3_update(&ctx, ir_binary, ir_size); _mesa_blake3_update(&ctx, &val_32bit, 4); - _mesa_blake3_final(&ctx, ir_sha1_cache_key); + _mesa_blake3_final(&ctx, ir_blake3_cache_key); blob_finish(&blob); } @@ -476,7 +476,7 @@ draw_llvm_create_variant(struct draw_llvm *llvm, struct llvm_vertex_shader *shader = llvm_vertex_shader(llvm->draw->vs.vertex_shader); char module_name[64]; - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]; + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]; struct lp_cached_code cached = { 0 }; bool needs_caching = false; variant = MALLOC(sizeof *variant + @@ -497,11 +497,11 @@ draw_llvm_create_variant(struct draw_llvm *llvm, key, shader->variant_key_size, num_inputs, - ir_sha1_cache_key); + ir_blake3_cache_key); llvm->draw->disk_cache_find_shader(llvm->draw->disk_cache_cookie, &cached, - ir_sha1_cache_key); + ir_blake3_cache_key); if (!cached.data_size) needs_caching = true; } @@ -530,7 +530,7 @@ draw_llvm_create_variant(struct draw_llvm *llvm, if (needs_caching) llvm->draw->disk_cache_insert_shader(llvm->draw->disk_cache_cookie, &cached, - ir_sha1_cache_key); + ir_blake3_cache_key); gallivm_free_ir(variant->gallivm); variant->list_item_global.base = variant; @@ -2505,7 +2505,7 @@ draw_gs_llvm_create_variant(struct draw_llvm *llvm, struct llvm_geometry_shader *shader = llvm_geometry_shader(llvm->draw->gs.geometry_shader); char module_name[64]; - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]; + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]; struct lp_cached_code cached = { 0 }; bool needs_caching = false; @@ -2528,11 +2528,11 @@ draw_gs_llvm_create_variant(struct draw_llvm *llvm, key, shader->variant_key_size, num_outputs, - ir_sha1_cache_key); + ir_blake3_cache_key); llvm->draw->disk_cache_find_shader(llvm->draw->disk_cache_cookie, &cached, - ir_sha1_cache_key); + ir_blake3_cache_key); if (!cached.data_size) needs_caching = true; } @@ -2553,7 +2553,7 @@ draw_gs_llvm_create_variant(struct draw_llvm *llvm, if (needs_caching) llvm->draw->disk_cache_insert_shader(llvm->draw->disk_cache_cookie, &cached, - ir_sha1_cache_key); + ir_blake3_cache_key); gallivm_free_ir(variant->gallivm); variant->list_item_global.base = variant; @@ -3177,7 +3177,7 @@ draw_tcs_llvm_create_variant(struct draw_llvm *llvm, struct draw_tcs_llvm_variant *variant; struct llvm_tess_ctrl_shader *shader = llvm_tess_ctrl_shader(llvm->draw->tcs.tess_ctrl_shader); char module_name[64]; - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]; + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]; struct lp_cached_code cached = { 0 }; bool needs_caching = false; @@ -3199,11 +3199,11 @@ draw_tcs_llvm_create_variant(struct draw_llvm *llvm, key, shader->variant_key_size, num_outputs, - ir_sha1_cache_key); + ir_blake3_cache_key); llvm->draw->disk_cache_find_shader(llvm->draw->disk_cache_cookie, &cached, - ir_sha1_cache_key); + ir_blake3_cache_key); if (!cached.data_size) needs_caching = true; } @@ -3227,7 +3227,7 @@ draw_tcs_llvm_create_variant(struct draw_llvm *llvm, if (needs_caching) llvm->draw->disk_cache_insert_shader(llvm->draw->disk_cache_cookie, &cached, - ir_sha1_cache_key); + ir_blake3_cache_key); gallivm_free_ir(variant->gallivm); variant->list_item_global.base = variant; @@ -3715,7 +3715,7 @@ draw_tes_llvm_create_variant(struct draw_llvm *llvm, struct draw_tes_llvm_variant *variant; struct llvm_tess_eval_shader *shader = llvm_tess_eval_shader(llvm->draw->tes.tess_eval_shader); char module_name[64]; - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]; + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]; struct lp_cached_code cached = { 0 }; bool needs_caching = false; @@ -3736,11 +3736,11 @@ draw_tes_llvm_create_variant(struct draw_llvm *llvm, key, shader->variant_key_size, num_outputs, - ir_sha1_cache_key); + ir_blake3_cache_key); llvm->draw->disk_cache_find_shader(llvm->draw->disk_cache_cookie, &cached, - ir_sha1_cache_key); + ir_blake3_cache_key); if (!cached.data_size) needs_caching = true; } @@ -3766,7 +3766,7 @@ draw_tes_llvm_create_variant(struct draw_llvm *llvm, if (needs_caching) llvm->draw->disk_cache_insert_shader(llvm->draw->disk_cache_cookie, &cached, - ir_sha1_cache_key); + ir_blake3_cache_key); gallivm_free_ir(variant->gallivm); variant->list_item_global.base = variant; diff --git a/src/gallium/auxiliary/draw/draw_private.h b/src/gallium/auxiliary/draw/draw_private.h index ef170801de3..e55d342739c 100644 --- a/src/gallium/auxiliary/draw/draw_private.h +++ b/src/gallium/auxiliary/draw/draw_private.h @@ -400,10 +400,10 @@ struct draw_context void *disk_cache_cookie; void (*disk_cache_find_shader)(void *cookie, struct lp_cached_code *cache, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]); + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]); void (*disk_cache_insert_shader)(void *cookie, struct lp_cached_code *cache, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]); + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]); void *driver_private; }; diff --git a/src/gallium/auxiliary/util/u_live_shader_cache.c b/src/gallium/auxiliary/util/u_live_shader_cache.c index f9e9a8bbb35..9f016474269 100644 --- a/src/gallium/auxiliary/util/u_live_shader_cache.c +++ b/src/gallium/auxiliary/util/u_live_shader_cache.c @@ -98,18 +98,18 @@ util_live_shader_cache_get(struct pipe_context *ctx, } /* Compute SHA1 of pipe_shader_state. */ - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; unsigned char sha1[BLAKE3_KEY_LEN]; - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, ir_binary, ir_size); + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, ir_binary, ir_size); if ((stage == MESA_SHADER_VERTEX || stage == MESA_SHADER_TESS_EVAL || stage == MESA_SHADER_GEOMETRY) && state->stream_output.num_outputs) { - _mesa_blake3_update(&sha1_ctx, &state->stream_output, + _mesa_blake3_update(&blake3_ctx, &state->stream_output, sizeof(state->stream_output)); } - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); if (ir_binary == blob.data) blob_finish(&blob); diff --git a/src/gallium/drivers/d3d12/d3d12_screen.cpp b/src/gallium/drivers/d3d12/d3d12_screen.cpp index 53e553442cf..7557e929b2e 100644 --- a/src/gallium/drivers/d3d12/d3d12_screen.cpp +++ b/src/gallium/drivers/d3d12/d3d12_screen.cpp @@ -1734,7 +1734,7 @@ d3d12_init_screen(struct d3d12_screen *screen, IUnknown *adapter) #endif const char *mesa_version = "Mesa " PACKAGE_VERSION MESA_GIT_SHA1; - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; uint8_t sha1[BLAKE3_KEY_LEN]; STATIC_ASSERT(PIPE_UUID_SIZE <= sizeof(sha1)); @@ -1747,12 +1747,12 @@ d3d12_init_screen(struct d3d12_screen *screen, IUnknown *adapter) memcpy(screen->driver_uuid, sha1, PIPE_UUID_SIZE); /* The device UUID uniquely identifies the given device within the machine. */ - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, &screen->vendor_id, sizeof(screen->vendor_id)); - _mesa_blake3_update(&sha1_ctx, &screen->device_id, sizeof(screen->device_id)); - _mesa_blake3_update(&sha1_ctx, &screen->subsys_id, sizeof(screen->subsys_id)); - _mesa_blake3_update(&sha1_ctx, &screen->revision, sizeof(screen->revision)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, &screen->vendor_id, sizeof(screen->vendor_id)); + _mesa_blake3_update(&blake3_ctx, &screen->device_id, sizeof(screen->device_id)); + _mesa_blake3_update(&blake3_ctx, &screen->subsys_id, sizeof(screen->subsys_id)); + _mesa_blake3_update(&blake3_ctx, &screen->revision, sizeof(screen->revision)); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(screen->device_uuid, sha1, PIPE_UUID_SIZE); d3d12_init_shader_caps(screen); diff --git a/src/gallium/drivers/llvmpipe/lp_context.c b/src/gallium/drivers/llvmpipe/lp_context.c index 02fd0591415..cf598434bb1 100644 --- a/src/gallium/drivers/llvmpipe/lp_context.c +++ b/src/gallium/drivers/llvmpipe/lp_context.c @@ -174,20 +174,20 @@ llvmpipe_texture_barrier(struct pipe_context *pipe, unsigned flags) static void lp_draw_disk_cache_find_shader(void *cookie, struct lp_cached_code *cache, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]) + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]) { struct llvmpipe_screen *screen = cookie; - lp_disk_cache_find_shader(screen, cache, ir_sha1_cache_key); + lp_disk_cache_find_shader(screen, cache, ir_blake3_cache_key); } static void lp_draw_disk_cache_insert_shader(void *cookie, struct lp_cached_code *cache, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]) + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]) { struct llvmpipe_screen *screen = cookie; - lp_disk_cache_insert_shader(screen, cache, ir_sha1_cache_key); + lp_disk_cache_insert_shader(screen, cache, ir_blake3_cache_key); } diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c index 393a29ed336..9e226c05b08 100644 --- a/src/gallium/drivers/llvmpipe/lp_screen.c +++ b/src/gallium/drivers/llvmpipe/lp_screen.c @@ -869,7 +869,7 @@ llvmpipe_fence_finish(struct pipe_screen *screen, static void -update_cache_sha1_cpu(blake3_hasher *ctx) +update_cache_blake3_cpu(blake3_hasher *ctx) { const struct util_cpu_caps_t *cpu_caps = util_get_cpu_caps(); /* @@ -896,7 +896,7 @@ lp_disk_cache_create(struct llvmpipe_screen *screen) return; _mesa_blake3_update(&ctx, &gallivm_perf, sizeof(gallivm_perf)); - update_cache_sha1_cpu(&ctx); + update_cache_blake3_cpu(&ctx); _mesa_blake3_final(&ctx, sha1); mesa_bytes_to_hex(cache_id, sha1, BLAKE3_KEY_LEN); @@ -928,13 +928,13 @@ llvmpipe_screen_get_fd(struct pipe_screen *_screen) void lp_disk_cache_find_shader(struct llvmpipe_screen *screen, struct lp_cached_code *cache, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]) + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]) { unsigned char sha1[CACHE_KEY_SIZE]; if (!screen->disk_shader_cache) return; - disk_cache_compute_key(screen->disk_shader_cache, ir_sha1_cache_key, + disk_cache_compute_key(screen->disk_shader_cache, ir_blake3_cache_key, 20, sha1); size_t binary_size; @@ -952,13 +952,13 @@ lp_disk_cache_find_shader(struct llvmpipe_screen *screen, void lp_disk_cache_insert_shader(struct llvmpipe_screen *screen, struct lp_cached_code *cache, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]) + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]) { unsigned char sha1[CACHE_KEY_SIZE]; if (!screen->disk_shader_cache || !cache->data_size || cache->dont_cache) return; - disk_cache_compute_key(screen->disk_shader_cache, ir_sha1_cache_key, + disk_cache_compute_key(screen->disk_shader_cache, ir_blake3_cache_key, 20, sha1); disk_cache_put(screen->disk_shader_cache, sha1, cache->data, cache->data_size, NULL); diff --git a/src/gallium/drivers/llvmpipe/lp_screen.h b/src/gallium/drivers/llvmpipe/lp_screen.h index 60dbee7cec3..882d3f3dac0 100644 --- a/src/gallium/drivers/llvmpipe/lp_screen.h +++ b/src/gallium/drivers/llvmpipe/lp_screen.h @@ -93,13 +93,13 @@ struct llvmpipe_screen void lp_disk_cache_find_shader(struct llvmpipe_screen *screen, struct lp_cached_code *cache, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]); + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]); void lp_disk_cache_insert_shader(struct llvmpipe_screen *screen, struct lp_cached_code *cache, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]); + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]); bool llvmpipe_screen_late_init(struct llvmpipe_screen *screen); diff --git a/src/gallium/drivers/llvmpipe/lp_state_cs.c b/src/gallium/drivers/llvmpipe/lp_state_cs.c index 1a39efe6d9d..940e771d41e 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_cs.c +++ b/src/gallium/drivers/llvmpipe/lp_state_cs.c @@ -1251,7 +1251,7 @@ lp_debug_cs_variant(const struct lp_compute_shader_variant *variant) static void lp_cs_get_ir_cache_key(struct lp_compute_shader_variant *variant, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]) + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]) { struct blob blob = { 0 }; unsigned ir_size; @@ -1266,7 +1266,7 @@ lp_cs_get_ir_cache_key(struct lp_compute_shader_variant *variant, _mesa_blake3_init(&ctx); _mesa_blake3_update(&ctx, &variant->key, variant->shader->variant_key_size); _mesa_blake3_update(&ctx, ir_binary, ir_size); - _mesa_blake3_final(&ctx, ir_sha1_cache_key); + _mesa_blake3_final(&ctx, ir_blake3_cache_key); blob_finish(&blob); } @@ -1296,13 +1296,13 @@ generate_variant(struct llvmpipe_context *lp, variant->shader = shader; memcpy(&variant->key, key, shader->variant_key_size); - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]; + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]; struct lp_cached_code cached = { 0 }; bool needs_caching = false; - lp_cs_get_ir_cache_key(variant, ir_sha1_cache_key); + lp_cs_get_ir_cache_key(variant, ir_blake3_cache_key); - lp_disk_cache_find_shader(screen, &cached, ir_sha1_cache_key); + lp_disk_cache_find_shader(screen, &cached, ir_blake3_cache_key); if (!cached.data_size) needs_caching = true; @@ -1349,7 +1349,7 @@ generate_variant(struct llvmpipe_context *lp, gallivm_jit_function(variant->gallivm, variant->function, variant->function_name); if (needs_caching) { - lp_disk_cache_insert_shader(screen, &cached, ir_sha1_cache_key); + lp_disk_cache_insert_shader(screen, &cached, ir_blake3_cache_key); } gallivm_free_ir(variant->gallivm); return variant; diff --git a/src/gallium/drivers/llvmpipe/lp_state_fs.c b/src/gallium/drivers/llvmpipe/lp_state_fs.c index de5b1338d3a..4f45fafba9f 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_fs.c +++ b/src/gallium/drivers/llvmpipe/lp_state_fs.c @@ -3793,7 +3793,7 @@ lp_debug_fs_variant(struct lp_fragment_shader_variant *variant) static void lp_fs_get_ir_cache_key(struct lp_fragment_shader_variant *variant, - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]) + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]) { struct blob blob = { 0 }; unsigned ir_size; @@ -3808,7 +3808,7 @@ lp_fs_get_ir_cache_key(struct lp_fragment_shader_variant *variant, _mesa_blake3_init(&ctx); _mesa_blake3_update(&ctx, &variant->key, variant->shader->variant_key_size); _mesa_blake3_update(&ctx, ir_binary, ir_size); - _mesa_blake3_final(&ctx, ir_sha1_cache_key); + _mesa_blake3_final(&ctx, ir_blake3_cache_key); blob_finish(&blob); } @@ -3838,12 +3838,12 @@ generate_variant(struct llvmpipe_context *lp, struct llvmpipe_screen *screen = llvmpipe_screen(lp->pipe.screen); struct lp_cached_code cached = { 0 }; - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]; + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]; bool needs_caching = false; if (shader->base.ir.nir) { - lp_fs_get_ir_cache_key(variant, ir_sha1_cache_key); + lp_fs_get_ir_cache_key(variant, ir_blake3_cache_key); - lp_disk_cache_find_shader(screen, &cached, ir_sha1_cache_key); + lp_disk_cache_find_shader(screen, &cached, ir_blake3_cache_key); if (!cached.data_size) needs_caching = true; } @@ -4058,7 +4058,7 @@ generate_variant(struct llvmpipe_context *lp, } if (needs_caching) { - lp_disk_cache_insert_shader(screen, &cached, ir_sha1_cache_key); + lp_disk_cache_insert_shader(screen, &cached, ir_blake3_cache_key); } gallivm_free_ir(variant->gallivm); diff --git a/src/gallium/drivers/nouveau/nouveau_screen.c b/src/gallium/drivers/nouveau/nouveau_screen.c index 348d371ee9a..f65b302b49d 100644 --- a/src/gallium/drivers/nouveau/nouveau_screen.c +++ b/src/gallium/drivers/nouveau/nouveau_screen.c @@ -275,12 +275,12 @@ static void nouveau_driver_uuid(struct pipe_screen *screen, char *uuid) { const char* driver = PACKAGE_VERSION MESA_GIT_SHA1; - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; uint8_t sha1[BLAKE3_KEY_LEN]; - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, driver, strlen(driver)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, driver, strlen(driver)); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(uuid, sha1, PIPE_UUID_SIZE); } diff --git a/src/gallium/drivers/r600/r600_pipe_common.c b/src/gallium/drivers/r600/r600_pipe_common.c index 3d9c19d3abf..ad88a228c32 100644 --- a/src/gallium/drivers/r600/r600_pipe_common.c +++ b/src/gallium/drivers/r600/r600_pipe_common.c @@ -934,13 +934,13 @@ static void r600_get_driver_uuid(UNUSED struct pipe_screen *screen, char *uuid) * OpenGL driver. People who want to share memory need to also check * the device UUID. */ - blake3_hasher sha1_ctx; - _mesa_blake3_init(&sha1_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); - _mesa_blake3_update(&sha1_ctx, driver_id, strlen(driver_id)); + _mesa_blake3_update(&blake3_ctx, driver_id, strlen(driver_id)); uint8_t sha1[BLAKE3_KEY_LEN]; - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); assert(BLAKE3_KEY_LEN >= PIPE_UUID_SIZE); memcpy(uuid, sha1, PIPE_UUID_SIZE); diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index 5fbd020cdd9..3ef1f6771c0 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -44,13 +44,13 @@ static void si_create_compute_state_async(void *job, void *gdata, int thread_ind program->shader.is_monolithic = true; program->shader.wave_size = si_determine_wave_size(sscreen, &program->shader); - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]; - si_get_ir_cache_key(sel, false, false, shader->wave_size, ir_sha1_cache_key); + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]; + si_get_ir_cache_key(sel, false, false, shader->wave_size, ir_blake3_cache_key); /* Try to load the shader from the shader cache. */ simple_mtx_lock(&sscreen->shader_cache_mutex); - if (si_shader_cache_load_shader(sscreen, ir_sha1_cache_key, shader)) { + if (si_shader_cache_load_shader(sscreen, ir_blake3_cache_key, shader)) { simple_mtx_unlock(&sscreen->shader_cache_mutex); shader->complete_shader_binary_size = si_get_shader_binary_size(sscreen, shader); @@ -96,7 +96,7 @@ static void si_create_compute_state_async(void *job, void *gdata, int thread_ind shader->config.rsrc3 |= S_00B8A0_INST_PREF_SIZE_GFX11(si_get_shader_prefetch_size(shader)); simple_mtx_lock(&sscreen->shader_cache_mutex); - si_shader_cache_insert_shader(sscreen, ir_sha1_cache_key, shader, true); + si_shader_cache_insert_shader(sscreen, ir_blake3_cache_key, shader, true); simple_mtx_unlock(&sscreen->shader_cache_mutex); } diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index 3ab9c74f921..5e940ce5f95 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -481,10 +481,10 @@ void si_emit_dpbb_state(struct si_context *sctx, unsigned index); /* si_state_shaders.cpp */ void si_get_ir_cache_key(struct si_shader_selector *sel, bool ngg, bool es, - unsigned wave_size, unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]); -bool si_shader_cache_load_shader(struct si_screen *sscreen, unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN], + unsigned wave_size, unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]); +bool si_shader_cache_load_shader(struct si_screen *sscreen, unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN], struct si_shader *shader); -void si_shader_cache_insert_shader(struct si_screen *sscreen, unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN], +void si_shader_cache_insert_shader(struct si_screen *sscreen, unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN], struct si_shader *shader, bool insert_into_disk_cache); bool si_shader_mem_ordered(struct si_shader *shader); PROC void si_init_screen_live_shader_cache(struct si_screen *sscreen) TAILV; diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.cpp b/src/gallium/drivers/radeonsi/si_state_shaders.cpp index e6d4ef48197..0a8b058a47b 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.cpp +++ b/src/gallium/drivers/radeonsi/si_state_shaders.cpp @@ -130,7 +130,7 @@ static bool si_shader_uses_bindless_images(struct si_shader_selector *selector) * Return the IR key for the shader cache. */ void si_get_ir_cache_key(struct si_shader_selector *sel, bool ngg, bool es, - unsigned wave_size, unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]) + unsigned wave_size, unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]) { struct blob blob = {}; unsigned ir_size; @@ -188,7 +188,7 @@ void si_get_ir_cache_key(struct si_shader_selector *sel, bool ngg, bool es, _mesa_blake3_init(&ctx); _mesa_blake3_update(&ctx, &shader_variant_flags, 4); _mesa_blake3_update(&ctx, ir_binary, ir_size); - _mesa_blake3_final(&ctx, ir_sha1_cache_key); + _mesa_blake3_final(&ctx, ir_blake3_cache_key); if (ir_binary == blob.data) blob_finish(&blob); @@ -344,7 +344,7 @@ static bool si_load_shader_binary(struct si_shader *shader, void *binary) * Insert a shader into the cache. It's assumed the shader is not in the cache. * Use si_shader_cache_load_shader before calling this. */ -void si_shader_cache_insert_shader(struct si_screen *sscreen, unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN], +void si_shader_cache_insert_shader(struct si_screen *sscreen, unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN], struct si_shader *shader, bool insert_into_disk_cache) { uint32_t *hw_binary; @@ -355,7 +355,7 @@ void si_shader_cache_insert_shader(struct si_screen *sscreen, unsigned char ir_s if (!insert_into_disk_cache && memory_cache_full) return; - entry = _mesa_hash_table_search(sscreen->shader_cache, ir_sha1_cache_key); + entry = _mesa_hash_table_search(sscreen->shader_cache, ir_blake3_cache_key); if (entry) return; /* already added */ @@ -390,7 +390,7 @@ void si_shader_cache_insert_shader(struct si_screen *sscreen, unsigned char ir_s if (!memory_cache_full) { if (_mesa_hash_table_insert(sscreen->shader_cache, - mem_dup(ir_sha1_cache_key, 20), + mem_dup(ir_blake3_cache_key, 20), hw_binary) == NULL) { FREE(hw_binary); return; @@ -400,7 +400,7 @@ void si_shader_cache_insert_shader(struct si_screen *sscreen, unsigned char ir_s } if (sscreen->disk_shader_cache && insert_into_disk_cache) { - disk_cache_compute_key(sscreen->disk_shader_cache, ir_sha1_cache_key, 20, key); + disk_cache_compute_key(sscreen->disk_shader_cache, ir_blake3_cache_key, 20, key); disk_cache_put(sscreen->disk_shader_cache, key, hw_binary, size, NULL); } @@ -408,10 +408,10 @@ void si_shader_cache_insert_shader(struct si_screen *sscreen, unsigned char ir_s FREE(hw_binary); } -bool si_shader_cache_load_shader(struct si_screen *sscreen, unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN], +bool si_shader_cache_load_shader(struct si_screen *sscreen, unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN], struct si_shader *shader) { - struct hash_entry *entry = _mesa_hash_table_search(sscreen->shader_cache, ir_sha1_cache_key); + struct hash_entry *entry = _mesa_hash_table_search(sscreen->shader_cache, ir_blake3_cache_key); if (entry) { if (si_load_shader_binary(shader, entry->data)) { @@ -425,7 +425,7 @@ bool si_shader_cache_load_shader(struct si_screen *sscreen, unsigned char ir_sha return false; unsigned char sha1[CACHE_KEY_SIZE]; - disk_cache_compute_key(sscreen->disk_shader_cache, ir_sha1_cache_key, 20, sha1); + disk_cache_compute_key(sscreen->disk_shader_cache, ir_blake3_cache_key, 20, sha1); size_t total_size; uint32_t *buffer = (uint32_t*)disk_cache_get(sscreen->disk_shader_cache, sha1, &total_size); @@ -440,7 +440,7 @@ bool si_shader_cache_load_shader(struct si_screen *sscreen, unsigned char ir_sha if (total_size >= sizeof(uint32_t) && size + gs_copy_binary_size == total_size) { if (si_load_shader_binary(shader, buffer)) { free(buffer); - si_shader_cache_insert_shader(sscreen, ir_sha1_cache_key, shader, false); + si_shader_cache_insert_shader(sscreen, ir_blake3_cache_key, shader, false); p_atomic_inc(&sscreen->num_disk_shader_cache_hits); return true; } @@ -3414,7 +3414,7 @@ static void si_init_shader_selector_async(void *job, void *gdata, int thread_ind */ if (!sscreen->use_monolithic_shaders) { struct si_shader *shader = CALLOC_STRUCT(si_shader); - unsigned char ir_sha1_cache_key[BLAKE3_KEY_LEN]; + unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN]; if (!shader) { mesa_loge("can't allocate a main shader part"); @@ -3446,15 +3446,15 @@ static void si_init_shader_selector_async(void *job, void *gdata, int thread_ind if (sel->stage <= MESA_SHADER_GEOMETRY || sel->stage == MESA_SHADER_MESH) { si_get_ir_cache_key(sel, shader->key.ge.as_ngg, shader->key.ge.as_es, - shader->wave_size, ir_sha1_cache_key); + shader->wave_size, ir_blake3_cache_key); } else { - si_get_ir_cache_key(sel, false, false, shader->wave_size, ir_sha1_cache_key); + si_get_ir_cache_key(sel, false, false, shader->wave_size, ir_blake3_cache_key); } /* Try to load the shader from the shader cache. */ simple_mtx_lock(&sscreen->shader_cache_mutex); - if (si_shader_cache_load_shader(sscreen, ir_sha1_cache_key, shader)) { + if (si_shader_cache_load_shader(sscreen, ir_blake3_cache_key, shader)) { simple_mtx_unlock(&sscreen->shader_cache_mutex); si_shader_dump_stats_for_shader_db(sscreen, shader, debug); } else { @@ -3471,7 +3471,7 @@ static void si_init_shader_selector_async(void *job, void *gdata, int thread_ind } simple_mtx_lock(&sscreen->shader_cache_mutex); - si_shader_cache_insert_shader(sscreen, ir_sha1_cache_key, shader, true); + si_shader_cache_insert_shader(sscreen, ir_blake3_cache_key, shader, true); simple_mtx_unlock(&sscreen->shader_cache_mutex); } diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c index f4840e55f86..fe4feccdb37 100644 --- a/src/gallium/drivers/virgl/virgl_screen.c +++ b/src/gallium/drivers/virgl/virgl_screen.c @@ -901,8 +901,8 @@ static struct disk_cache *virgl_get_disk_shader_cache (struct pipe_screen *pscre static void virgl_disk_cache_create(struct virgl_screen *screen) { - blake3_hasher sha1_ctx; - _mesa_blake3_init(&sha1_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); #if HAVE_BUILD_ID const struct build_id_note *note = @@ -915,15 +915,15 @@ static void virgl_disk_cache_create(struct virgl_screen *screen) const uint8_t *id_sha1 = build_id_data(note); assert(id_sha1); - _mesa_blake3_update(&sha1_ctx, id_sha1, build_id_len); + _mesa_blake3_update(&blake3_ctx, id_sha1, build_id_len); #endif /* When we switch the host the caps might change and then we might have to * apply different lowering. */ - _mesa_blake3_update(&sha1_ctx, &screen->caps, sizeof(screen->caps)); + _mesa_blake3_update(&blake3_ctx, &screen->caps, sizeof(screen->caps)); uint8_t sha1[BLAKE3_KEY_LEN]; - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); char timestamp[BLAKE3_HEX_LEN]; _mesa_blake3_format(timestamp, sha1); diff --git a/src/gallium/frontends/rusticl/mesa/util/disk_cache.rs b/src/gallium/frontends/rusticl/mesa/util/disk_cache.rs index 8427c321818..5f9efbb315c 100644 --- a/src/gallium/frontends/rusticl/mesa/util/disk_cache.rs +++ b/src/gallium/frontends/rusticl/mesa/util/disk_cache.rs @@ -79,19 +79,19 @@ impl DiskCacheBorrowed { impl DiskCache { pub fn new(name: &CStr, func_ptrs: &[*mut c_void], flags: u64) -> Option { - let mut sha_ctx = blake3_hasher::default(); + let mut blake3_ctx = blake3_hasher::default(); let mut sha = [0; BLAKE3_KEY_LEN as usize]; let mut cache_id = [0; BLAKE3_HEX_LEN as usize]; let cache = unsafe { - _mesa_blake3_init(&mut sha_ctx); + _mesa_blake3_init(&mut blake3_ctx); for &func_ptr in func_ptrs { - if !disk_cache_get_function_identifier(func_ptr, &mut sha_ctx) { + if !disk_cache_get_function_identifier(func_ptr, &mut blake3_ctx) { return None; } } - _mesa_blake3_final(&mut sha_ctx, &mut sha); + _mesa_blake3_final(&mut blake3_ctx, &mut sha); mesa_bytes_to_hex(cache_id.as_mut_ptr(), sha.as_ptr(), sha.len() as u32); disk_cache_create(name.as_ptr(), cache_id.as_ptr(), flags) }; diff --git a/src/imagination/vulkan/pvr_instance.c b/src/imagination/vulkan/pvr_instance.c index 7d85b48c86b..d8112af81fa 100644 --- a/src/imagination/vulkan/pvr_instance.c +++ b/src/imagination/vulkan/pvr_instance.c @@ -297,7 +297,7 @@ out: } static bool -pvr_get_driver_build_sha(uint8_t sha_out[const static BUILD_ID_EXPECTED_HASH_LENGTH]) +pvr_get_driver_build_sha(uint8_t blake3_out[const static BUILD_ID_EXPECTED_HASH_LENGTH]) { const struct build_id_note *note; unsigned build_id_len; @@ -314,7 +314,7 @@ pvr_get_driver_build_sha(uint8_t sha_out[const static BUILD_ID_EXPECTED_HASH_LEN return false; } - memcpy(sha_out, build_id_data(note), BUILD_ID_EXPECTED_HASH_LENGTH); + memcpy(blake3_out, build_id_data(note), BUILD_ID_EXPECTED_HASH_LENGTH); return true; } diff --git a/src/imagination/vulkan/pvr_physical_device.c b/src/imagination/vulkan/pvr_physical_device.c index 4308bd16884..1fd79194d9b 100644 --- a/src/imagination/vulkan/pvr_physical_device.c +++ b/src/imagination/vulkan/pvr_physical_device.c @@ -881,12 +881,12 @@ pvr_get_device_uuid(const struct pvr_device_info *dev_info, { uint64_t bvnc = pvr_get_packed_bvnc(dev_info); static const char *device_str = "pvr"; - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, device_str, strlen(device_str)); - _mesa_blake3_update(&sha1_ctx, &bvnc, sizeof(bvnc)); - _mesa_blake3_final(&sha1_ctx, uuid_out); + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, device_str, strlen(device_str)); + _mesa_blake3_update(&blake3_ctx, &bvnc, sizeof(bvnc)); + _mesa_blake3_final(&blake3_ctx, uuid_out); } static void @@ -895,17 +895,17 @@ pvr_get_cache_uuid(const struct pvr_physical_device *const pdevice, { const struct pvr_instance *instance = pdevice->instance; static const char *cache_str = "cache"; - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, cache_str, strlen(cache_str)); - _mesa_blake3_update(&sha1_ctx, + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, cache_str, strlen(cache_str)); + _mesa_blake3_update(&blake3_ctx, pdevice->device_uuid, sizeof(pdevice->device_uuid)); - _mesa_blake3_update(&sha1_ctx, + _mesa_blake3_update(&blake3_ctx, instance->driver_build_sha, sizeof(instance->driver_build_sha)); - _mesa_blake3_final(&sha1_ctx, uuid_out); + _mesa_blake3_final(&blake3_ctx, uuid_out); } static void diff --git a/src/intel/common/intel_uuid.c b/src/intel/common/intel_uuid.c index 1549929ccf7..54851496730 100644 --- a/src/intel/common/intel_uuid.c +++ b/src/intel/common/intel_uuid.c @@ -75,7 +75,7 @@ intel_uuid_compute_driver_id(uint8_t *uuid, size_t size) { const char* intelDriver = PACKAGE_VERSION MESA_GIT_SHA1; - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; uint8_t sha1[BLAKE3_KEY_LEN]; assert(size <= sizeof(sha1)); @@ -86,10 +86,10 @@ intel_uuid_compute_driver_id(uint8_t *uuid, * driver. People who want to share memory need to also check the device * UUID. */ - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, intelDriver, strlen(intelDriver)); - _mesa_blake3_update(&sha1_ctx, &devinfo->has_bit6_swizzle, + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, intelDriver, strlen(intelDriver)); + _mesa_blake3_update(&blake3_ctx, &devinfo->has_bit6_swizzle, sizeof(devinfo->has_bit6_swizzle)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(uuid, sha1, size); } diff --git a/src/intel/compiler/brw/brw_compiler.c b/src/intel/compiler/brw/brw_compiler.c index 24e46baf48e..4227741328a 100644 --- a/src/intel/compiler/brw/brw_compiler.c +++ b/src/intel/compiler/brw/brw_compiler.c @@ -284,7 +284,7 @@ brw_device_sha1(char *hex, const struct intel_device_info *devinfo) { blake3_hasher ctx; _mesa_blake3_init(&ctx); - brw_device_sha1_update(&ctx, devinfo); + brw_device_blake3_update(&ctx, devinfo); unsigned char result[BLAKE3_KEY_LEN]; _mesa_blake3_final(&ctx, result); _mesa_blake3_format(hex, result); diff --git a/src/intel/compiler/brw/brw_compiler.h b/src/intel/compiler/brw/brw_compiler.h index 2fb517d4101..7e2f8033cc5 100644 --- a/src/intel/compiler/brw/brw_compiler.h +++ b/src/intel/compiler/brw/brw_compiler.h @@ -1298,10 +1298,10 @@ brw_device_sha1(char *hex, const struct intel_device_info *devinfo); /* For callers computing their own UUID or hash. Hashes all device * information fields that could affect shader compilation into the provided - * sha1_ctx. + * blake3_ctx. */ void -brw_device_sha1_update(blake3_hasher *sha1_ctx, +brw_device_blake3_update(blake3_hasher *blake3_ctx, const struct intel_device_info *devinfo); unsigned diff --git a/src/intel/compiler/brw_device_sha1_gen_c.py b/src/intel/compiler/brw_device_sha1_gen_c.py index a6b5f615aff..d5ea7d24041 100755 --- a/src/intel/compiler/brw_device_sha1_gen_c.py +++ b/src/intel/compiler/brw_device_sha1_gen_c.py @@ -25,7 +25,7 @@ template = COPYRIGHT + """ #define SHA_UPDATE_FIELD(field) _mesa_blake3_update(ctx, &devinfo->field, sizeof(devinfo->field)) void -brw_device_sha1_update(blake3_hasher *ctx, +brw_device_blake3_update(blake3_hasher *ctx, const struct intel_device_info *devinfo) { % for member in compiler_fields: % if member.ray_tracing_field: diff --git a/src/intel/perf/intel_perf.c b/src/intel/perf/intel_perf.c index b2afa7b8d39..556f9d61161 100644 --- a/src/intel/perf/intel_perf.c +++ b/src/intel/perf/intel_perf.c @@ -797,27 +797,27 @@ intel_perf_store_configuration(struct intel_perf_config *perf_cfg, int fd, if (guid) return kmd_add_config(perf_cfg, fd, config, guid); - blake3_hasher sha1_ctx; - _mesa_blake3_init(&sha1_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); if (config->flex_regs) { - _mesa_blake3_update(&sha1_ctx, config->flex_regs, + _mesa_blake3_update(&blake3_ctx, config->flex_regs, sizeof(config->flex_regs[0]) * config->n_flex_regs); } if (config->mux_regs) { - _mesa_blake3_update(&sha1_ctx, config->mux_regs, + _mesa_blake3_update(&blake3_ctx, config->mux_regs, sizeof(config->mux_regs[0]) * config->n_mux_regs); } if (config->b_counter_regs) { - _mesa_blake3_update(&sha1_ctx, config->b_counter_regs, + _mesa_blake3_update(&blake3_ctx, config->b_counter_regs, sizeof(config->b_counter_regs[0]) * config->n_b_counter_regs); } uint8_t hash[BLAKE3_KEY_LEN]; - _mesa_blake3_final(&sha1_ctx, hash); + _mesa_blake3_final(&blake3_ctx, hash); char formatted_hash[BLAKE3_HEX_LEN]; _mesa_blake3_format(formatted_hash, hash); diff --git a/src/intel/vulkan/anv_perf.c b/src/intel/vulkan/anv_perf.c index 5a8ac67835e..381f39f1699 100644 --- a/src/intel/vulkan/anv_perf.c +++ b/src/intel/vulkan/anv_perf.c @@ -373,11 +373,11 @@ VkResult anv_EnumeratePhysicalDeviceQueueFamilyPerformanceQueryCountersKHR( counter->scope = VK_PERFORMANCE_COUNTER_SCOPE_COMMAND_KHR; counter->storage = intel_perf_counter_data_type_to_vk_storage[intel_counter->data_type]; - unsigned char sha1_result[BLAKE3_KEY_LEN]; + unsigned char blake3_result[BLAKE3_KEY_LEN]; _mesa_blake3_compute(intel_counter->symbol_name, strlen(intel_counter->symbol_name), - sha1_result); - memcpy(counter->uuid, sha1_result, sizeof(counter->uuid)); + blake3_result); + memcpy(counter->uuid, blake3_result, sizeof(counter->uuid)); } vk_outarray_append_typed(VkPerformanceCounterDescriptionKHR, &out_desc, desc) { diff --git a/src/intel/vulkan/anv_physical_device.c b/src/intel/vulkan/anv_physical_device.c index af2d9c35456..a7e57ed6933 100644 --- a/src/intel/vulkan/anv_physical_device.c +++ b/src/intel/vulkan/anv_physical_device.c @@ -1795,20 +1795,20 @@ get_properties(const struct anv_physical_device *pdevice, * different tilings sometimes (see isl_gfx7.c). */ { - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; uint8_t sha1[BLAKE3_KEY_LEN]; - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, pdevice->driver_build_sha1, + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, pdevice->driver_build_sha1, sizeof(pdevice->driver_build_sha1)); - _mesa_blake3_update(&sha1_ctx, &pdevice->info.platform, + _mesa_blake3_update(&blake3_ctx, &pdevice->info.platform, sizeof(pdevice->info.platform)); if (pdevice->info.platform == INTEL_PLATFORM_SKL && pdevice->info.gt == 4) { - _mesa_blake3_update(&sha1_ctx, &pdevice->info.gt, + _mesa_blake3_update(&blake3_ctx, &pdevice->info.gt, sizeof(pdevice->info.gt)); } - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); assert(ARRAY_SIZE(sha1) >= VK_UUID_SIZE); memcpy(props->optimalTilingLayoutUUID, sha1, VK_UUID_SIZE); @@ -2374,20 +2374,20 @@ anv_physical_device_init_uuids(struct anv_physical_device *device) copy_build_id_to_sha1(device->driver_build_sha1, note); - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; uint8_t sha1[BLAKE3_KEY_LEN]; STATIC_ASSERT(VK_UUID_SIZE <= sizeof(sha1)); /* The pipeline cache UUID is used for determining when a pipeline cache is * invalid. It needs both a driver build and the PCI ID of the device. */ - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, build_id_data(note), build_id_len); - brw_device_sha1_update(&sha1_ctx, &device->info); + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, build_id_data(note), build_id_len); + brw_device_blake3_update(&blake3_ctx, &device->info); bool always_use_bindless = !!(device->instance->debug & ANV_DEBUG_BINDLESS); - _mesa_blake3_update(&sha1_ctx, &always_use_bindless, + _mesa_blake3_update(&blake3_ctx, &always_use_bindless, sizeof(always_use_bindless)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(device->pipeline_cache_uuid, sha1, VK_UUID_SIZE); intel_uuid_compute_driver_id(device->driver_uuid, &device->info, VK_UUID_SIZE); diff --git a/src/intel/vulkan/anv_pipeline_cache.c b/src/intel/vulkan/anv_pipeline_cache.c index fca502118d3..a2d559b364f 100644 --- a/src/intel/vulkan/anv_pipeline_cache.c +++ b/src/intel/vulkan/anv_pipeline_cache.c @@ -297,13 +297,13 @@ struct nir_shader * anv_device_search_for_nir(struct anv_device *device, struct vk_pipeline_cache *cache, const nir_shader_compiler_options *nir_options, - unsigned char sha1_key[BLAKE3_KEY_LEN], + unsigned char blake3_key[BLAKE3_KEY_LEN], void *mem_ctx) { if (cache == NULL) cache = device->vk.mem_cache; - return vk_pipeline_cache_lookup_nir(cache, sha1_key, BLAKE3_KEY_LEN, + return vk_pipeline_cache_lookup_nir(cache, blake3_key, BLAKE3_KEY_LEN, nir_options, NULL, mem_ctx); } @@ -311,12 +311,12 @@ void anv_device_upload_nir(struct anv_device *device, struct vk_pipeline_cache *cache, const struct nir_shader *nir, - unsigned char sha1_key[BLAKE3_KEY_LEN]) + unsigned char blake3_key[BLAKE3_KEY_LEN]) { if (cache == NULL) cache = device->vk.mem_cache; - vk_pipeline_cache_add_nir(cache, sha1_key, BLAKE3_KEY_LEN, nir); + vk_pipeline_cache_add_nir(cache, blake3_key, BLAKE3_KEY_LEN, nir); } void @@ -326,11 +326,11 @@ anv_load_fp64_shader(struct anv_device *device) &device->physical->compiler->nir_options[MESA_SHADER_VERTEX]; const char* shader_name = "float64_spv_lib"; - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; uint8_t sha1[BLAKE3_KEY_LEN]; - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, shader_name, strlen(shader_name)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, shader_name, strlen(shader_name)); + _mesa_blake3_final(&blake3_ctx, sha1); device->fp64_nir = anv_device_search_for_nir(device, device->internal_cache, diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 0de1b7648ba..45f483e5e50 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -1929,14 +1929,14 @@ struct nir_shader * anv_device_search_for_nir(struct anv_device *device, struct vk_pipeline_cache *cache, const struct nir_shader_compiler_options *nir_options, - unsigned char sha1_key[BLAKE3_KEY_LEN], + unsigned char blake3_key[BLAKE3_KEY_LEN], void *mem_ctx); void anv_device_upload_nir(struct anv_device *device, struct vk_pipeline_cache *cache, const struct nir_shader *nir, - unsigned char sha1_key[BLAKE3_KEY_LEN]); + unsigned char blake3_key[BLAKE3_KEY_LEN]); void anv_load_fp64_shader(struct anv_device *device); diff --git a/src/intel/vulkan_hasvk/anv_descriptor_set.c b/src/intel/vulkan_hasvk/anv_descriptor_set.c index 3890fa5da8e..be7792b32ca 100644 --- a/src/intel/vulkan_hasvk/anv_descriptor_set.c +++ b/src/intel/vulkan_hasvk/anv_descriptor_set.c @@ -701,7 +701,7 @@ void anv_DestroyDescriptorSetLayout( #define BLAKE3_UPDATE_VALUE(ctx, x) _mesa_blake3_update(ctx, &(x), sizeof(x)); static void -sha1_update_immutable_sampler(blake3_hasher *ctx, +blake3_update_immutable_sampler(blake3_hasher *ctx, const struct anv_sampler *sampler) { if (!sampler->conversion) @@ -713,7 +713,7 @@ sha1_update_immutable_sampler(blake3_hasher *ctx, } static void -sha1_update_descriptor_set_binding_layout(blake3_hasher *ctx, +blake3_update_descriptor_set_binding_layout(blake3_hasher *ctx, const struct anv_descriptor_set_binding_layout *layout) { BLAKE3_UPDATE_VALUE(ctx, layout->flags); @@ -727,12 +727,12 @@ sha1_update_descriptor_set_binding_layout(blake3_hasher *ctx, if (layout->immutable_samplers) { for (uint16_t i = 0; i < layout->array_size; i++) - sha1_update_immutable_sampler(ctx, layout->immutable_samplers[i]); + blake3_update_immutable_sampler(ctx, layout->immutable_samplers[i]); } } static void -sha1_update_descriptor_set_layout(blake3_hasher *ctx, +blake3_update_descriptor_set_layout(blake3_hasher *ctx, const struct anv_descriptor_set_layout *layout) { BLAKE3_UPDATE_VALUE(ctx, layout->binding_count); @@ -743,7 +743,7 @@ sha1_update_descriptor_set_layout(blake3_hasher *ctx, BLAKE3_UPDATE_VALUE(ctx, layout->descriptor_buffer_size); for (uint16_t i = 0; i < layout->binding_count; i++) - sha1_update_descriptor_set_binding_layout(ctx, &layout->binding[i]); + blake3_update_descriptor_set_binding_layout(ctx, &layout->binding[i]); } /* @@ -785,7 +785,7 @@ VkResult anv_CreatePipelineLayout( blake3_hasher ctx; _mesa_blake3_init(&ctx); for (unsigned s = 0; s < layout->num_sets; s++) { - sha1_update_descriptor_set_layout(&ctx, layout->set[s].layout); + blake3_update_descriptor_set_layout(&ctx, layout->set[s].layout); _mesa_blake3_update(&ctx, &layout->set[s].dynamic_offset_start, sizeof(layout->set[s].dynamic_offset_start)); } diff --git a/src/intel/vulkan_hasvk/anv_device.c b/src/intel/vulkan_hasvk/anv_device.c index 2f102f1859c..e324ad7ea3e 100644 --- a/src/intel/vulkan_hasvk/anv_device.c +++ b/src/intel/vulkan_hasvk/anv_device.c @@ -1423,24 +1423,24 @@ anv_physical_device_init_uuids(struct anv_physical_device *device) copy_build_id_to_sha1(device->driver_build_sha1, note); - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; uint8_t sha1[BLAKE3_KEY_LEN]; STATIC_ASSERT(VK_UUID_SIZE <= sizeof(sha1)); /* The pipeline cache UUID is used for determining when a pipeline cache is * invalid. It needs both a driver build and the PCI ID of the device. */ - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, build_id_data(note), build_id_len); - _mesa_blake3_update(&sha1_ctx, &device->info.pci_device_id, + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, build_id_data(note), build_id_len); + _mesa_blake3_update(&blake3_ctx, &device->info.pci_device_id, sizeof(device->info.pci_device_id)); - _mesa_blake3_update(&sha1_ctx, &device->always_use_bindless, + _mesa_blake3_update(&blake3_ctx, &device->always_use_bindless, sizeof(device->always_use_bindless)); - _mesa_blake3_update(&sha1_ctx, &device->has_a64_buffer_access, + _mesa_blake3_update(&blake3_ctx, &device->has_a64_buffer_access, sizeof(device->has_a64_buffer_access)); - _mesa_blake3_update(&sha1_ctx, &device->has_bindless_samplers, + _mesa_blake3_update(&blake3_ctx, &device->has_bindless_samplers, sizeof(device->has_bindless_samplers)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(device->pipeline_cache_uuid, sha1, VK_UUID_SIZE); intel_uuid_compute_driver_id(device->driver_uuid, &device->info, VK_UUID_SIZE); diff --git a/src/intel/vulkan_hasvk/anv_perf.c b/src/intel/vulkan_hasvk/anv_perf.c index 65c8576b561..ebe753124ac 100644 --- a/src/intel/vulkan_hasvk/anv_perf.c +++ b/src/intel/vulkan_hasvk/anv_perf.c @@ -311,11 +311,11 @@ VkResult anv_EnumeratePhysicalDeviceQueueFamilyPerformanceQueryCountersKHR( counter->scope = VK_PERFORMANCE_COUNTER_SCOPE_COMMAND_KHR; counter->storage = intel_perf_counter_data_type_to_vk_storage[intel_counter->data_type]; - unsigned char sha1_result[BLAKE3_KEY_LEN]; + unsigned char blake3_result[BLAKE3_KEY_LEN]; _mesa_blake3_compute(intel_counter->symbol_name, strlen(intel_counter->symbol_name), - sha1_result); - memcpy(counter->uuid, sha1_result, sizeof(counter->uuid)); + blake3_result); + memcpy(counter->uuid, blake3_result, sizeof(counter->uuid)); } vk_outarray_append_typed(VkPerformanceCounterDescriptionKHR, &out_desc, desc) { diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c index 537b05527e0..263cff2859a 100644 --- a/src/intel/vulkan_hasvk/anv_pipeline.c +++ b/src/intel/vulkan_hasvk/anv_pipeline.c @@ -369,7 +369,7 @@ static void anv_pipeline_hash_graphics(struct anv_graphics_pipeline *pipeline, struct anv_pipeline_layout *layout, struct anv_pipeline_stage *stages, - unsigned char *sha1_out) + unsigned char *blake3_out) { blake3_hasher ctx; _mesa_blake3_init(&ctx); @@ -388,14 +388,14 @@ anv_pipeline_hash_graphics(struct anv_graphics_pipeline *pipeline, } } - _mesa_blake3_final(&ctx, sha1_out); + _mesa_blake3_final(&ctx, blake3_out); } static void anv_pipeline_hash_compute(struct anv_compute_pipeline *pipeline, struct anv_pipeline_layout *layout, struct anv_pipeline_stage *stage, - unsigned char *sha1_out) + unsigned char *blake3_out) { blake3_hasher ctx; _mesa_blake3_init(&ctx); @@ -415,7 +415,7 @@ anv_pipeline_hash_compute(struct anv_compute_pipeline *pipeline, sizeof(stage->shader_sha1)); _mesa_blake3_update(&ctx, &stage->key.cs, sizeof(stage->key.cs)); - _mesa_blake3_final(&ctx, sha1_out); + _mesa_blake3_final(&ctx, blake3_out); } static nir_shader * diff --git a/src/intel/vulkan_hasvk/anv_pipeline_cache.c b/src/intel/vulkan_hasvk/anv_pipeline_cache.c index f3cdbad26e8..4c60f566dbe 100644 --- a/src/intel/vulkan_hasvk/anv_pipeline_cache.c +++ b/src/intel/vulkan_hasvk/anv_pipeline_cache.c @@ -340,13 +340,13 @@ struct nir_shader * anv_device_search_for_nir(struct anv_device *device, struct vk_pipeline_cache *cache, const nir_shader_compiler_options *nir_options, - unsigned char sha1_key[BLAKE3_KEY_LEN], + unsigned char blake3_key[BLAKE3_KEY_LEN], void *mem_ctx) { if (cache == NULL) cache = device->default_pipeline_cache; - return vk_pipeline_cache_lookup_nir(cache, sha1_key, BLAKE3_KEY_LEN, + return vk_pipeline_cache_lookup_nir(cache, blake3_key, BLAKE3_KEY_LEN, nir_options, NULL, mem_ctx); } @@ -354,10 +354,10 @@ void anv_device_upload_nir(struct anv_device *device, struct vk_pipeline_cache *cache, const struct nir_shader *nir, - unsigned char sha1_key[BLAKE3_KEY_LEN]) + unsigned char blake3_key[BLAKE3_KEY_LEN]) { if (cache == NULL) cache = device->default_pipeline_cache; - vk_pipeline_cache_add_nir(cache, sha1_key, BLAKE3_KEY_LEN, nir); + vk_pipeline_cache_add_nir(cache, blake3_key, BLAKE3_KEY_LEN, nir); } diff --git a/src/intel/vulkan_hasvk/anv_private.h b/src/intel/vulkan_hasvk/anv_private.h index 303c9bbaf29..ec7405d1dbe 100644 --- a/src/intel/vulkan_hasvk/anv_private.h +++ b/src/intel/vulkan_hasvk/anv_private.h @@ -988,14 +988,14 @@ struct nir_shader * anv_device_search_for_nir(struct anv_device *device, struct vk_pipeline_cache *cache, const struct nir_shader_compiler_options *nir_options, - unsigned char sha1_key[BLAKE3_KEY_LEN], + unsigned char blake3_key[BLAKE3_KEY_LEN], void *mem_ctx); void anv_device_upload_nir(struct anv_device *device, struct vk_pipeline_cache *cache, const struct nir_shader *nir, - unsigned char sha1_key[BLAKE3_KEY_LEN]); + unsigned char blake3_key[BLAKE3_KEY_LEN]); struct anv_device { struct vk_device vk; diff --git a/src/kosmickrisp/vulkan/kk_physical_device.c b/src/kosmickrisp/vulkan/kk_physical_device.c index 2df2334de9d..fa4b182e7ae 100644 --- a/src/kosmickrisp/vulkan/kk_physical_device.c +++ b/src/kosmickrisp/vulkan/kk_physical_device.c @@ -736,14 +736,14 @@ kk_physical_device_init_pipeline_cache(struct kk_physical_device *pdev) { struct kk_instance *instance = kk_physical_device_instance(pdev); - blake3_hasher sha_ctx; - _mesa_blake3_init(&sha_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); - _mesa_blake3_update(&sha_ctx, instance->driver_build_sha, + _mesa_blake3_update(&blake3_ctx, instance->driver_build_sha, sizeof(instance->driver_build_sha)); unsigned char sha[BLAKE3_KEY_LEN]; - _mesa_blake3_final(&sha_ctx, sha); + _mesa_blake3_final(&blake3_ctx, sha); STATIC_ASSERT(BLAKE3_KEY_LEN >= VK_UUID_SIZE); memcpy(pdev->vk.properties.pipelineCacheUUID, sha, VK_UUID_SIZE); diff --git a/src/microsoft/vulkan/dzn_device.c b/src/microsoft/vulkan/dzn_device.c index ed6e27368a9..f32cd5714ed 100644 --- a/src/microsoft/vulkan/dzn_device.c +++ b/src/microsoft/vulkan/dzn_device.c @@ -351,7 +351,7 @@ dzn_physical_device_init_uuids(struct dzn_physical_device *pdev) { const char *mesa_version = "Mesa " PACKAGE_VERSION MESA_GIT_SHA1; - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; uint8_t sha1[BLAKE3_KEY_LEN]; STATIC_ASSERT(VK_UUID_SIZE <= sizeof(sha1)); @@ -360,13 +360,13 @@ dzn_physical_device_init_uuids(struct dzn_physical_device *pdev) * provided by the D3D12 driver, so let's hash the build ID plus some * caps that might impact our NIR lowering passes. */ - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, mesa_version, strlen(mesa_version)); - disk_cache_get_function_identifier(dzn_physical_device_init_uuids, &sha1_ctx); - _mesa_blake3_update(&sha1_ctx, &pdev->options, + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, mesa_version, strlen(mesa_version)); + disk_cache_get_function_identifier(dzn_physical_device_init_uuids, &blake3_ctx); + _mesa_blake3_update(&blake3_ctx, &pdev->options, offsetof(struct dzn_physical_device, options21) + sizeof(pdev->options21) - offsetof(struct dzn_physical_device, options)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(pdev->pipeline_cache_uuid, sha1, VK_UUID_SIZE); /* The driver UUID is used for determining sharability of images and memory @@ -378,12 +378,12 @@ dzn_physical_device_init_uuids(struct dzn_physical_device *pdev) memcpy(pdev->driver_uuid, sha1, VK_UUID_SIZE); /* The device UUID uniquely identifies the given device within the machine. */ - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, &pdev->desc.vendor_id, sizeof(pdev->desc.vendor_id)); - _mesa_blake3_update(&sha1_ctx, &pdev->desc.device_id, sizeof(pdev->desc.device_id)); - _mesa_blake3_update(&sha1_ctx, &pdev->desc.subsys_id, sizeof(pdev->desc.subsys_id)); - _mesa_blake3_update(&sha1_ctx, &pdev->desc.revision, sizeof(pdev->desc.revision)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, &pdev->desc.vendor_id, sizeof(pdev->desc.vendor_id)); + _mesa_blake3_update(&blake3_ctx, &pdev->desc.device_id, sizeof(pdev->desc.device_id)); + _mesa_blake3_update(&blake3_ctx, &pdev->desc.subsys_id, sizeof(pdev->desc.subsys_id)); + _mesa_blake3_update(&blake3_ctx, &pdev->desc.revision, sizeof(pdev->desc.revision)); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(pdev->device_uuid, sha1, VK_UUID_SIZE); } diff --git a/src/nouveau/vulkan/nvk_physical_device.c b/src/nouveau/vulkan/nvk_physical_device.c index 496d6774e60..af0a3cffddb 100644 --- a/src/nouveau/vulkan/nvk_physical_device.c +++ b/src/nouveau/vulkan/nvk_physical_device.c @@ -1323,20 +1323,20 @@ nvk_physical_device_init_pipeline_cache(struct nvk_physical_device *pdev) { const struct nvk_instance *instance = nvk_physical_device_instance(pdev); - blake3_hasher sha_ctx; - _mesa_blake3_init(&sha_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); - _mesa_blake3_update(&sha_ctx, instance->driver_build_sha, + _mesa_blake3_update(&blake3_ctx, instance->driver_build_sha, sizeof(instance->driver_build_sha)); - _mesa_blake3_update(&sha_ctx, &pdev->info.chipset, + _mesa_blake3_update(&blake3_ctx, &pdev->info.chipset, sizeof(pdev->info.chipset)); const uint64_t compiler_flags = nvk_physical_device_compiler_flags(pdev); - _mesa_blake3_update(&sha_ctx, &compiler_flags, sizeof(compiler_flags)); + _mesa_blake3_update(&blake3_ctx, &compiler_flags, sizeof(compiler_flags)); unsigned char sha[BLAKE3_KEY_LEN]; - _mesa_blake3_final(&sha_ctx, sha); + _mesa_blake3_final(&blake3_ctx, sha); STATIC_ASSERT(BLAKE3_KEY_LEN >= VK_UUID_SIZE); memcpy(pdev->vk.properties.pipelineCacheUUID, sha, VK_UUID_SIZE); diff --git a/src/panfrost/vulkan/panvk_physical_device.c b/src/panfrost/vulkan/panvk_physical_device.c index 7be7ff6c49d..752f9661b0f 100644 --- a/src/panfrost/vulkan/panvk_physical_device.c +++ b/src/panfrost/vulkan/panvk_physical_device.c @@ -144,17 +144,17 @@ static void init_shader_caches(struct panvk_physical_device *device, const struct panvk_instance *instance) { - blake3_hasher sha_ctx; - _mesa_blake3_init(&sha_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); - _mesa_blake3_update(&sha_ctx, instance->driver_build_sha, + _mesa_blake3_update(&blake3_ctx, instance->driver_build_sha, sizeof(instance->driver_build_sha)); - _mesa_blake3_update(&sha_ctx, &device->kmod.dev->props.gpu_id, + _mesa_blake3_update(&blake3_ctx, &device->kmod.dev->props.gpu_id, sizeof(device->kmod.dev->props.gpu_id)); unsigned char sha[BLAKE3_KEY_LEN]; - _mesa_blake3_final(&sha_ctx, sha); + _mesa_blake3_final(&blake3_ctx, sha); STATIC_ASSERT(VK_UUID_SIZE <= BLAKE3_KEY_LEN); memcpy(device->cache_uuid, sha, VK_UUID_SIZE); diff --git a/src/util/os_memory_fd.c b/src/util/os_memory_fd.c index e48fd86cf37..8ded02dee1a 100644 --- a/src/util/os_memory_fd.c +++ b/src/util/os_memory_fd.c @@ -57,13 +57,13 @@ struct memory_header { }; static void -get_driver_id_sha1_hash(uint8_t sha1[BLAKE3_KEY_LEN], const char *driver_id) { - blake3_hasher sha1_ctx; - _mesa_blake3_init(&sha1_ctx); +get_driver_id_blake3_hash(uint8_t sha1[BLAKE3_KEY_LEN], const char *driver_id) { + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); - _mesa_blake3_update(&sha1_ctx, driver_id, strlen(driver_id)); + _mesa_blake3_update(&blake3_ctx, driver_id, strlen(driver_id)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); } static bool @@ -77,7 +77,7 @@ get_fd_header(int fd, struct memory_header *header, char const *driver_id) // Check the uuid we put after the sizes in order to verify that the fd // is a memfd that we created and not some random fd. uint8_t sha1[BLAKE3_KEY_LEN]; - get_driver_id_sha1_hash(sha1, driver_id); + get_driver_id_blake3_hash(sha1, driver_id); assert(BLAKE3_KEY_LEN >= UUID_SIZE); return memcmp(header->uuid, sha1, UUID_SIZE) == 0; @@ -182,7 +182,7 @@ os_malloc_aligned_fd(size_t size, size_t alignment, int *fd, char const *fd_name // Add the hash of the driver_id as a uuid to the header in order to identify the memory // when importing. uint8_t sha1[BLAKE3_KEY_LEN]; - get_driver_id_sha1_hash(sha1, driver_id); + get_driver_id_blake3_hash(sha1, driver_id); assert(BLAKE3_KEY_LEN >= UUID_SIZE); memcpy(header->uuid, sha1, UUID_SIZE); diff --git a/src/virtio/vulkan/vn_image.c b/src/virtio/vulkan/vn_image.c index 49c0d849584..b3a39fb558c 100644 --- a/src/virtio/vulkan/vn_image.c +++ b/src/virtio/vulkan/vn_image.c @@ -92,12 +92,12 @@ vn_image_get_image_reqs_key(struct vn_device *dev, const VkImageCreateInfo *create_info, uint8_t *key) { - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; if (!dev->image_reqs_cache.ht) return false; - _mesa_blake3_init(&sha1_ctx); + _mesa_blake3_init(&blake3_ctx); /* Hash relevant fields in the pNext chain */ vk_foreach_struct_const(src, create_info->pNext) { @@ -105,14 +105,14 @@ vn_image_get_image_reqs_key(struct vn_device *dev, case VK_STRUCTURE_TYPE_EXTERNAL_MEMORY_IMAGE_CREATE_INFO: { struct VkExternalMemoryImageCreateInfo *ext_mem = (struct VkExternalMemoryImageCreateInfo *)src; - _mesa_blake3_update(&sha1_ctx, &ext_mem->handleTypes, + _mesa_blake3_update(&blake3_ctx, &ext_mem->handleTypes, sizeof(VkExternalMemoryHandleTypeFlags)); break; } case VK_STRUCTURE_TYPE_IMAGE_FORMAT_LIST_CREATE_INFO: { struct VkImageFormatListCreateInfo *format_list = (struct VkImageFormatListCreateInfo *)src; - _mesa_blake3_update(&sha1_ctx, format_list->pViewFormats, + _mesa_blake3_update(&blake3_ctx, format_list->pViewFormats, sizeof(VkFormat) * format_list->viewFormatCount); break; } @@ -120,7 +120,7 @@ vn_image_get_image_reqs_key(struct vn_device *dev, struct VkImageDrmFormatModifierListCreateInfoEXT *format_mod_list = (struct VkImageDrmFormatModifierListCreateInfoEXT *)src; _mesa_blake3_update( - &sha1_ctx, format_mod_list->pDrmFormatModifiers, + &blake3_ctx, format_mod_list->pDrmFormatModifiers, sizeof(uint64_t) * format_mod_list->drmFormatModifierCount); break; } @@ -128,10 +128,10 @@ vn_image_get_image_reqs_key(struct vn_device *dev, struct VkImageDrmFormatModifierExplicitCreateInfoEXT *format_mod_explicit = (struct VkImageDrmFormatModifierExplicitCreateInfoEXT *)src; - _mesa_blake3_update(&sha1_ctx, &format_mod_explicit->drmFormatModifier, + _mesa_blake3_update(&blake3_ctx, &format_mod_explicit->drmFormatModifier, sizeof(uint64_t)); _mesa_blake3_update( - &sha1_ctx, format_mod_explicit->pPlaneLayouts, + &blake3_ctx, format_mod_explicit->pPlaneLayouts, sizeof(VkSubresourceLayout) * format_mod_explicit->drmFormatModifierPlaneCount); break; @@ -139,7 +139,7 @@ vn_image_get_image_reqs_key(struct vn_device *dev, case VK_STRUCTURE_TYPE_IMAGE_STENCIL_USAGE_CREATE_INFO: { struct VkImageStencilUsageCreateInfo *stencil_usage = (struct VkImageStencilUsageCreateInfo *)src; - _mesa_blake3_update(&sha1_ctx, &stencil_usage->stencilUsage, + _mesa_blake3_update(&blake3_ctx, &stencil_usage->stencilUsage, sizeof(VkImageUsageFlags)); break; } @@ -161,7 +161,7 @@ vn_image_get_image_reqs_key(struct vn_device *dev, offsetof(VkImageCreateInfo, queueFamilyIndexCount) - offsetof(VkImageCreateInfo, flags); - _mesa_blake3_update(&sha1_ctx, &create_info->flags, + _mesa_blake3_update(&blake3_ctx, &create_info->flags, create_image_hash_block_size); /* Follow pointer and hash pQueueFamilyIndices separately. @@ -170,13 +170,13 @@ vn_image_get_image_reqs_key(struct vn_device *dev, */ if (create_info->sharingMode == VK_SHARING_MODE_CONCURRENT) { _mesa_blake3_update( - &sha1_ctx, create_info->pQueueFamilyIndices, + &blake3_ctx, create_info->pQueueFamilyIndices, sizeof(uint32_t) * create_info->queueFamilyIndexCount); } - _mesa_blake3_update(&sha1_ctx, &create_info->initialLayout, + _mesa_blake3_update(&blake3_ctx, &create_info->initialLayout, sizeof(create_info->initialLayout)); - _mesa_blake3_final(&sha1_ctx, key); + _mesa_blake3_final(&blake3_ctx, key); return true; } diff --git a/src/virtio/vulkan/vn_physical_device.c b/src/virtio/vulkan/vn_physical_device.c index c09808800a7..b640327b689 100644 --- a/src/virtio/vulkan/vn_physical_device.c +++ b/src/virtio/vulkan/vn_physical_device.c @@ -472,29 +472,29 @@ static void vn_physical_device_init_uuids(struct vn_physical_device *physical_dev) { struct vk_properties *props = &physical_dev->base.vk.properties; - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; uint8_t sha1[BLAKE3_KEY_LEN]; static_assert(VK_UUID_SIZE <= BLAKE3_KEY_LEN, ""); - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, &props->pipelineCacheUUID, + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, &props->pipelineCacheUUID, sizeof(props->pipelineCacheUUID)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(props->pipelineCacheUUID, sha1, VK_UUID_SIZE); - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, &props->vendorID, sizeof(props->vendorID)); - _mesa_blake3_update(&sha1_ctx, &props->deviceID, sizeof(props->deviceID)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, &props->vendorID, sizeof(props->vendorID)); + _mesa_blake3_update(&blake3_ctx, &props->deviceID, sizeof(props->deviceID)); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(props->deviceUUID, sha1, VK_UUID_SIZE); - _mesa_blake3_init(&sha1_ctx); - _mesa_blake3_update(&sha1_ctx, props->driverName, strlen(props->driverName)); - _mesa_blake3_update(&sha1_ctx, props->driverInfo, strlen(props->driverInfo)); - _mesa_blake3_final(&sha1_ctx, sha1); + _mesa_blake3_init(&blake3_ctx); + _mesa_blake3_update(&blake3_ctx, props->driverName, strlen(props->driverName)); + _mesa_blake3_update(&blake3_ctx, props->driverInfo, strlen(props->driverInfo)); + _mesa_blake3_final(&blake3_ctx, sha1); memcpy(props->driverUUID, sha1, VK_UUID_SIZE); @@ -2370,12 +2370,12 @@ vn_image_get_image_format_key( const VkImageFormatProperties2 *format_props, uint8_t *key) { - blake3_hasher sha1_ctx; + blake3_hasher blake3_ctx; if (!physical_dev->image_format_cache.ht) return false; - _mesa_blake3_init(&sha1_ctx); + _mesa_blake3_init(&blake3_ctx); /* VUID-VkPhysicalDeviceImageFormatInfo2-pNext-pNext * Each pNext member of any structure (including this one) in the pNext @@ -2394,10 +2394,10 @@ vn_image_get_image_format_key( case VK_STRUCTURE_TYPE_IMAGE_COMPRESSION_CONTROL_EXT: { VkImageCompressionControlEXT *compression_control = (VkImageCompressionControlEXT *)src; - _mesa_blake3_update(&sha1_ctx, &compression_control->flags, + _mesa_blake3_update(&blake3_ctx, &compression_control->flags, sizeof(VkImageCompressionFlagsEXT)); _mesa_blake3_update( - &sha1_ctx, compression_control->pFixedRateFlags, + &blake3_ctx, compression_control->pFixedRateFlags, sizeof(uint32_t) * compression_control->compressionControlPlaneCount); break; @@ -2406,7 +2406,7 @@ vn_image_get_image_format_key( VkImageFormatListCreateInfo *format_list = (VkImageFormatListCreateInfo *)src; _mesa_blake3_update( - &sha1_ctx, format_list->pViewFormats, + &blake3_ctx, format_list->pViewFormats, sizeof(VkFormat) * format_list->viewFormatCount); break; @@ -2414,25 +2414,25 @@ vn_image_get_image_format_key( case VK_STRUCTURE_TYPE_IMAGE_STENCIL_USAGE_CREATE_INFO: { VkImageStencilUsageCreateInfo *stencil_usage = (VkImageStencilUsageCreateInfo *)src; - _mesa_blake3_update(&sha1_ctx, &stencil_usage->stencilUsage, + _mesa_blake3_update(&blake3_ctx, &stencil_usage->stencilUsage, sizeof(VkImageUsageFlags)); break; } case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_IMAGE_FORMAT_INFO: { VkPhysicalDeviceExternalImageFormatInfo *ext_image = (VkPhysicalDeviceExternalImageFormatInfo *)src; - _mesa_blake3_update(&sha1_ctx, &ext_image->handleType, + _mesa_blake3_update(&blake3_ctx, &ext_image->handleType, sizeof(VkExternalMemoryHandleTypeFlagBits)); break; } case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGE_DRM_FORMAT_MODIFIER_INFO_EXT: { VkPhysicalDeviceImageDrmFormatModifierInfoEXT *modifier_info = (VkPhysicalDeviceImageDrmFormatModifierInfoEXT *)src; - _mesa_blake3_update(&sha1_ctx, &modifier_info->drmFormatModifier, + _mesa_blake3_update(&blake3_ctx, &modifier_info->drmFormatModifier, sizeof(uint64_t)); if (modifier_info->sharingMode == VK_SHARING_MODE_CONCURRENT) { _mesa_blake3_update( - &sha1_ctx, modifier_info->pQueueFamilyIndices, + &blake3_ctx, modifier_info->pQueueFamilyIndices, sizeof(uint32_t) * modifier_info->queueFamilyIndexCount); } break; @@ -2440,7 +2440,7 @@ vn_image_get_image_format_key( case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGE_VIEW_IMAGE_FORMAT_INFO_EXT: { VkPhysicalDeviceImageViewImageFormatInfoEXT *view_image = (VkPhysicalDeviceImageViewImageFormatInfoEXT *)src; - _mesa_blake3_update(&sha1_ctx, &view_image->imageViewType, + _mesa_blake3_update(&blake3_ctx, &view_image->imageViewType, sizeof(VkImageViewType)); break; } @@ -2477,7 +2477,7 @@ vn_image_get_image_format_key( case VK_STRUCTURE_TYPE_IMAGE_COMPRESSION_PROPERTIES_EXT: case VK_STRUCTURE_TYPE_SAMPLER_YCBCR_CONVERSION_IMAGE_FORMAT_PROPERTIES: case VK_STRUCTURE_TYPE_FILTER_CUBIC_IMAGE_VIEW_IMAGE_FORMAT_PROPERTIES_EXT: - _mesa_blake3_update(&sha1_ctx, &src->sType, + _mesa_blake3_update(&blake3_ctx, &src->sType, sizeof(VkStructureType)); break; default: @@ -2491,9 +2491,9 @@ vn_image_get_image_format_key( sizeof(VkFormat) + sizeof(VkImageType) + sizeof(VkImageTiling) + sizeof(VkImageUsageFlags) + sizeof(VkImageCreateFlags); - _mesa_blake3_update(&sha1_ctx, &format_info->format, + _mesa_blake3_update(&blake3_ctx, &format_info->format, format_info_2_hash_block_size); - _mesa_blake3_final(&sha1_ctx, key); + _mesa_blake3_final(&blake3_ctx, key); return true; } diff --git a/src/vulkan/runtime/vk_shader.c b/src/vulkan/runtime/vk_shader.c index 9ad0cc3ad7c..4fb8aeefb9d 100644 --- a/src/vulkan/runtime/vk_shader.c +++ b/src/vulkan/runtime/vk_shader.c @@ -354,17 +354,17 @@ vk_shader_serialize(struct vk_device *device, if (blob->data != NULL) { assert(sizeof(header) <= blob->size); - blake3_hasher sha1_ctx; - _mesa_blake3_init(&sha1_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); /* Hash the header with a zero SHA1 */ - _mesa_blake3_update(&sha1_ctx, &header, sizeof(header)); + _mesa_blake3_update(&blake3_ctx, &header, sizeof(header)); /* Hash the serialized data */ - _mesa_blake3_update(&sha1_ctx, blob->data + sizeof(header), + _mesa_blake3_update(&blake3_ctx, blob->data + sizeof(header), blob->size - sizeof(header)); - _mesa_blake3_final(&sha1_ctx, header.sha1); + _mesa_blake3_final(&blake3_ctx, header.sha1); blob_overwrite_bytes(blob, header_offset, &header, sizeof(header)); } @@ -427,19 +427,19 @@ vk_shader_deserialize(struct vk_device *device, assert(blob.current == (uint8_t *)data + sizeof(header)); blob.end = (uint8_t *)data + data_size; - blake3_hasher sha1_ctx; - _mesa_blake3_init(&sha1_ctx); + blake3_hasher blake3_ctx; + _mesa_blake3_init(&blake3_ctx); /* Hash the header with a zero SHA1 */ - struct vk_shader_bin_header sha1_header = header; - memset(sha1_header.sha1, 0, sizeof(sha1_header.sha1)); - _mesa_blake3_update(&sha1_ctx, &sha1_header, sizeof(sha1_header)); + struct vk_shader_bin_header blake3_header = header; + memset(blake3_header.sha1, 0, sizeof(blake3_header.sha1)); + _mesa_blake3_update(&blake3_ctx, &blake3_header, sizeof(blake3_header)); /* Hash the serialized data */ - _mesa_blake3_update(&sha1_ctx, (uint8_t *)data + sizeof(header), + _mesa_blake3_update(&blake3_ctx, (uint8_t *)data + sizeof(header), data_size - sizeof(header)); - _mesa_blake3_final(&sha1_ctx, ref_header.sha1); + _mesa_blake3_final(&blake3_ctx, ref_header.sha1); if (memcmp(header.sha1, ref_header.sha1, sizeof(header.sha1))) return vk_error(device, VK_ERROR_INCOMPATIBLE_SHADER_BINARY_EXT);