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radeon: calculate complete texture state inside TFP function

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(really not sure why I'm doing this).

This is a candidate for 7.9 and 7.10 branches.
This commit is contained in:
Dave Airlie 2011-01-19 15:27:54 +10:00 • committed by Alex Deucher
parent 8402caf752
commit d3d2be2de1
1 changed files with 25 additions and 3 deletions
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28
src/mesa/drivers/dri/radeon/radeon_texstate.c
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@ -639,6 +639,21 @@ void radeonSetTexOffset(__DRIcontext * pDRICtx, GLint texname,
}
}
static int
logbase2(int n)
{
GLint i = 1;
GLint log2 = 0;
while (n > i) {
i *= 2;
log2++;
}
return log2;
}
void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_format,
__DRIdrawable *dPriv)
{
@ -652,12 +667,11 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form
struct radeon_framebuffer *rfb;
radeonTexObjPtr t;
uint32_t pitch_val;
uint32_t internalFormat, type, format;
uint32_t internalFormat, format;
gl_format texFormat;
type = GL_BGRA;
format = GL_UNSIGNED_BYTE;
internalFormat = (texture_format == __DRI_TEXTURE_FORMAT_RGB ? 3 : 4);
internalFormat = (texture_format == __DRI_TEXTURE_FORMAT_RGB ? GL_RGB : GL_RGBA);
radeon = pDRICtx->driverPrivate;
rmesa = pDRICtx->driverPrivate;
@ -739,6 +753,14 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form
t->pp_txformat |= RADEON_TXFORMAT_NON_POWER2;
t->pp_txpitch = pitch_val;
t->pp_txpitch -= 32;
} else {
t->pp_txformat &= ~(RADEON_TXFORMAT_WIDTH_MASK |
RADEON_TXFORMAT_HEIGHT_MASK |
RADEON_TXFORMAT_CUBIC_MAP_ENABLE |
RADEON_TXFORMAT_F5_WIDTH_MASK |
RADEON_TXFORMAT_F5_HEIGHT_MASK);
t->pp_txformat |= ((texImage->WidthLog2 << RADEON_TXFORMAT_WIDTH_SHIFT) |
(texImage->HeightLog2 << RADEON_TXFORMAT_HEIGHT_SHIFT));
}
t->validated = GL_TRUE;
_mesa_unlock_texture(radeon->glCtx, texObj);