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aco: handle unaligned vertex fetch on GFX10

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pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 0 -> 0 (0.00 %)
VGPRS: 0 -> 0 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 0 -> 0 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 0 -> 0 (0.00 %)

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 795000 -> 802368 (0.93 %)
VGPRS: 579632 -> 581280 (0.28 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 17208408 -> 17583652 (2.18 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 145731 -> 145279 (-0.31 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3086>
This commit is contained in:
Rhys Perry 2019-12-13 13:23:11 +00:00
parent d9e357e35b
commit d39f5519a1
1 changed files with 2 additions and 1 deletions
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3
src/amd/compiler/aco_instruction_selection.cpp
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@ -3072,7 +3072,8 @@ bool check_vertex_fetch_size(isel_context *ctx, const ac_data_format_info *vtx_i
unsigned vertex_byte_size = vtx_info->chan_byte_size * channels;
if (vtx_info->chan_byte_size != 4 && channels == 3)
return false;
return true;
return (ctx->options->chip_class != GFX6 && ctx->options->chip_class != GFX10) ||
(offset % vertex_byte_size == 0 && stride % vertex_byte_size == 0);
}
uint8_t get_fetch_data_format(isel_context *ctx, const ac_data_format_info *vtx_info,