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panfrost: Adjust the draw descriptor definition
Add missing fields, and rename some of the existing fields. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6980>
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1e7d82c881
commit
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6 changed files with 39 additions and 24 deletions
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@ -141,9 +141,11 @@ panfrost_launch_grid(struct pipe_context *pipe,
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}
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pan_section_pack(t.cpu, COMPUTE_JOB, DRAW, cfg) {
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cfg.unknown_1 = (dev->quirks & IS_BIFROST) ? 0x2 : 0x6;
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cfg.draw_descriptor_is_64b = true;
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if (!(dev->quirks & IS_BIFROST))
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cfg.texture_descriptor_is_64b = true;
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cfg.state = panfrost_emit_compute_shader_meta(batch, PIPE_SHADER_COMPUTE);
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cfg.shared = panfrost_emit_shared_memory(batch, info);
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cfg.thread_storage = panfrost_emit_shared_memory(batch, info);
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cfg.uniform_buffers = panfrost_emit_const_buf(batch,
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PIPE_SHADER_COMPUTE, &cfg.push_uniforms);
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cfg.textures = panfrost_emit_texture_descriptors(batch,
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@ -258,8 +258,8 @@ pan_emit_draw_descs(struct panfrost_batch *batch,
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struct MALI_DRAW *d, enum pipe_shader_type st)
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{
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d->offset_start = batch->ctx->offset_start;
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d->instances = batch->ctx->instance_count > 1 ?
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batch->ctx->padded_count : 1;
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d->instance_size = batch->ctx->instance_count > 1 ?
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batch->ctx->padded_count : 1;
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d->uniform_buffers = panfrost_emit_const_buf(batch, st, &d->push_uniforms);
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d->textures = panfrost_emit_texture_descriptors(batch, st);
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@ -296,12 +296,14 @@ panfrost_draw_emit_vertex(struct panfrost_batch *batch,
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}
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pan_section_pack(job, COMPUTE_JOB, DRAW, cfg) {
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cfg.unknown_1 = (device->quirks & IS_BIFROST) ? 0x2 : 0x6;
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cfg.draw_descriptor_is_64b = true;
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if (!(device->quirks & IS_BIFROST))
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cfg.texture_descriptor_is_64b = true;
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cfg.state = panfrost_emit_compute_shader_meta(batch, PIPE_SHADER_VERTEX);
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cfg.attributes = panfrost_emit_vertex_data(batch, &cfg.attribute_buffers);
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cfg.varyings = vs_vary;
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cfg.varying_buffers = varyings;
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cfg.shared = shared_mem;
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cfg.thread_storage = shared_mem;
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pan_emit_draw_descs(batch, &cfg, PIPE_SHADER_VERTEX);
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}
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}
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@ -381,7 +383,10 @@ panfrost_draw_emit_tiler(struct panfrost_batch *batch,
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pan_section_ptr(job, BIFROST_TILER_JOB, DRAW) :
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pan_section_ptr(job, MIDGARD_TILER_JOB, DRAW);
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pan_pack(section, DRAW, cfg) {
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cfg.unknown_1 = (device->quirks & IS_BIFROST) ? 0x3 : 0x7;
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cfg.four_components_per_vertex = true;
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cfg.draw_descriptor_is_64b = true;
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if (!(device->quirks & IS_BIFROST))
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cfg.texture_descriptor_is_64b = true;
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cfg.front_face_ccw = rast->front_ccw;
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cfg.cull_front_face = rast->cull_face & PIPE_FACE_FRONT;
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cfg.cull_back_face = rast->cull_face & PIPE_FACE_BACK;
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@ -390,7 +395,7 @@ panfrost_draw_emit_tiler(struct panfrost_batch *batch,
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cfg.viewport = panfrost_emit_viewport(batch);
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cfg.varyings = fs_vary;
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cfg.varying_buffers = varyings;
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cfg.shared = shared_mem;
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cfg.thread_storage = shared_mem;
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pan_emit_draw_descs(batch, &cfg, PIPE_SHADER_FRAGMENT);
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@ -195,8 +195,8 @@ bit_vertex(struct panfrost_device *dev, panfrost_program prog,
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}
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pan_section_pack(&job, COMPUTE_JOB, DRAW, cfg) {
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cfg.unknown_1 = 0x2;
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cfg.shared = shmem->gpu;
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cfg.draw_descriptor_is_64b = true;
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cfg.thread_storage = shmem->gpu;
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cfg.state = shader_desc->gpu;
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cfg.push_uniforms = ubo->gpu + 1024;
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cfg.uniform_buffers = ubo->gpu;
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@ -1124,14 +1124,14 @@ pandecode_vertex_tiler_postfix_pre(
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};
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if (is_bifrost)
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pandecode_compute_fbd(p->shared & ~1, job_no);
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else if (p->shared & MALI_FBD_TAG_IS_MFBD)
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fbd_info = pandecode_mfbd_bfr((u64) ((uintptr_t) p->shared) & ~MALI_FBD_TAG_MASK,
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pandecode_compute_fbd(p->fbd & ~1, job_no);
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else if (p->fbd & MALI_FBD_TAG_IS_MFBD)
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fbd_info = pandecode_mfbd_bfr((u64) ((uintptr_t) p->fbd) & ~MALI_FBD_TAG_MASK,
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job_no, false, job_type == MALI_JOB_TYPE_COMPUTE, is_bifrost, gpu_id);
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else if (job_type == MALI_JOB_TYPE_COMPUTE)
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pandecode_compute_fbd((u64) (uintptr_t) p->shared, job_no);
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pandecode_compute_fbd((u64) (uintptr_t) p->fbd, job_no);
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else
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fbd_info = pandecode_sfbd((u64) (uintptr_t) p->shared, job_no, false, gpu_id);
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fbd_info = pandecode_sfbd((u64) (uintptr_t) p->fbd, job_no, false, gpu_id);
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int varying_count = 0, attribute_count = 0, uniform_count = 0, uniform_buffer_count = 0;
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int texture_count = 0, sampler_count = 0;
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@ -1224,7 +1224,7 @@ pandecode_vertex_tiler_postfix_pre(
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* per-RT descriptors */
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if (job_type == MALI_JOB_TYPE_TILER &&
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(is_bifrost || p->shared & MALI_FBD_TAG_IS_MFBD)) {
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(is_bifrost || p->fbd & MALI_FBD_TAG_IS_MFBD)) {
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void* blend_base = ((void *) cl) + MALI_STATE_LENGTH;
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for (unsigned i = 0; i < fbd_info.rt_count; i++) {
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@ -342,16 +342,21 @@
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</struct>
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<struct name="Draw" size="30">
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<field name="Unknown 1" size="3" start="0:0" type="uint"/>
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<field name="Four Components Per Vertex" size="1" start="0:0" type="bool"/>
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<field name="Draw Descriptor Is 64b" size="1" start="0:1" type="bool"/>
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<field name="Texture Descriptor Is 64b" size="1" start="0:2" type="bool"/>
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<field name="Occlusion query" size="2" start="0:3" type="Occlusion Mode" default="Disabled"/>
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<field name="Front face CCW" size="1" start="0:5" type="bool"/>
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<field name="Cull front face" size="1" start="0:6" type="bool"/>
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<field name="Cull back face" size="1" start="0:7" type="bool"/>
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<!-- TODO 0:7-0:15 -->
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<field name="Instances" size="8" start="0:16" type="padded" default="1"/>
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<!-- TODO: 0:16-0:24 -->
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<field name="Flat Shading Vertex" size="1" start="0:8" type="uint"/>
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<field name="Exclude Filtered Perf Counters" size="1" start="0:9" type="bool"/>
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<field name="Primitive Barrier" size="1" start="0:10" type="bool"/>
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<field name="Clean Fragment Write" size="1" start="0:11" type="bool"/>
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<field name="Instance Size" size="8" start="0:16" type="padded" default="1"/>
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<field name="Instance Primitive Size" size="8" start="0:24" type="padded" default="1"/>
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<field name="Offset start" size="32" start="1:0" type="uint"/>
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<!-- TODO: 2-3 -->
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<field name="Primitive Index Base" size="32" start="2:0" type="uint"/>
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<field name="Position" size="64" start="4:0" type="address"/>
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<field name="Uniform buffers" size="64" start="6:0" type="address"/>
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<field name="Textures" size="64" start="8:0" type="address"/>
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@ -364,7 +369,8 @@
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<field name="Varyings" size="64" start="22:0" type="address"/>
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<field name="Viewport" size="64" start="24:0" type="address"/>
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<field name="Occlusion" size="64" start="26:0" type="address"/>
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<field name="Shared" size="64" start="28:0" type="address"/>
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<field name="Thread Storage" size="64" start="28:0" type="address"/>
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<field name="FBD" size="64" start="28:0" type="address"/>
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</struct>
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<struct name="Midgard Sampler">
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@ -346,7 +346,9 @@ panfrost_load_midg(
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panfrost_pool_alloc_aligned(pool, MALI_MIDGARD_TILER_JOB_LENGTH, 64);
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pan_section_pack(t.cpu, MIDGARD_TILER_JOB, DRAW, cfg) {
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cfg.unknown_1 = 0x7;
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cfg.four_components_per_vertex = true;
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cfg.draw_descriptor_is_64b = true;
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cfg.texture_descriptor_is_64b = true;
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cfg.position = coordinates;
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cfg.textures = panfrost_pool_upload(pool, &texture_t.gpu, sizeof(texture_t.gpu));
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cfg.samplers = sampler.gpu;
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@ -354,7 +356,7 @@ panfrost_load_midg(
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cfg.varying_buffers = varying_buffer.gpu;
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cfg.varyings = varying.gpu;
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cfg.viewport = viewport.gpu;
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cfg.shared = fbd;
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cfg.fbd = fbd;
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}
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pan_section_pack(t.cpu, MIDGARD_TILER_JOB, PRIMITIVE, cfg) {
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