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i965: Make Gen4-5 and Gen8+ ALT checks use ctx->_Shader too.

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Commit c0347705 changed the Gen6-7 code to use ctx->_Shader rather than
ctx->Shader, but neglected to change the Gen4-5 or Gen8+ code.

This might fix SSO related bugs, but ALT mode is only used for ARB
programs, so if there's an actual problem, it's likely no one would
run into it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Kenneth Graunke 2014-11-30 01:41:15 -08:00
parent 8daf3c53c7
commit d300e58db0
4 changed files with 4 additions and 4 deletions
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2
src/mesa/drivers/dri/i965/brw_vs_state.c
View file

@ -60,7 +60,7 @@ brw_upload_vs_unit(struct brw_context *brw)
/* Use ALT floating point mode for ARB vertex programs, because they
* require 0^0 == 1.
*/
if (brw->ctx.Shader.CurrentProgram[MESA_SHADER_VERTEX] == NULL)
if (brw->ctx._Shader->CurrentProgram[MESA_SHADER_VERTEX] == NULL)
vs->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
else
vs->thread1.floating_point_mode = BRW_FLOATING_POINT_IEEE_754;

2
src/mesa/drivers/dri/i965/brw_wm_state.c
View file

@ -119,7 +119,7 @@ brw_upload_wm_unit(struct brw_context *brw)
* rendering, CurrentProgram[MESA_SHADER_FRAGMENT] is used for this check
* to differentiate between the GLSL and non-GLSL cases.
*/
if (ctx->Shader.CurrentProgram[MESA_SHADER_FRAGMENT] == NULL)
if (ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT] == NULL)
wm->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
else
wm->thread1.floating_point_mode = BRW_FLOATING_POINT_IEEE_754;

2
src/mesa/drivers/dri/i965/gen8_ps_state.c
View file

@ -146,7 +146,7 @@ upload_ps_state(struct brw_context *brw)
* rendering, CurrentFragmentProgram is used for this check to
* differentiate between the GLSL and non-GLSL cases.
*/
if (ctx->Shader.CurrentProgram[MESA_SHADER_FRAGMENT] == NULL)
if (ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT] == NULL)
dw3 |= GEN7_PS_FLOATING_POINT_MODE_ALT;
/* 3DSTATE_PS expects the number of threads per PSD, which is always 64;

2
src/mesa/drivers/dri/i965/gen8_vs_state.c
View file

@ -42,7 +42,7 @@ upload_vs_state(struct brw_context *brw)
/* Use ALT floating point mode for ARB vertex programs, because they
* require 0^0 == 1.
*/
if (ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX] == NULL)
if (ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX] == NULL)
floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT;
BEGIN_BATCH(9);