i965/cfg: Clean up cfg_t constructors.

parent_mem_ctx was unused since db47074a, so remove the two wrappers
around create() and make create() the constructor.

Reviewed-by: Eric Anholt <eric@anholt.net>

src/mesa/drivers/dri/i965/brw_cfg.cpp

@@ -77,18 +77,7 @@ bblock_t::dump(backend_visitor *v)
    }
 }
 
-cfg_t::cfg_t(backend_visitor *v)
-{
-   create(v->mem_ctx, &v->instructions);
-}
-
-cfg_t::cfg_t(void *mem_ctx, exec_list *instructions)
-{
-   create(mem_ctx, instructions);
-}
-
-void
-cfg_t::create(void *parent_mem_ctx, exec_list *instructions)
+cfg_t::cfg_t(exec_list *instructions)
 {
    mem_ctx = ralloc_context(NULL);
    block_list.make_empty();

src/mesa/drivers/dri/i965/brw_cfg.h

@@ -73,12 +73,9 @@ class cfg_t {
 public:
    DECLARE_RALLOC_CXX_OPERATORS(cfg_t)
 
-   cfg_t(backend_visitor *v);
-   cfg_t(void *mem_ctx, exec_list *instructions);
+   cfg_t(exec_list *instructions);
    ~cfg_t();
 
-   void create(void *mem_ctx, exec_list *instructions);
-
    bblock_t *new_block();
    void set_next_block(bblock_t *block);
    void make_block_array();

src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp

@@ -39,7 +39,7 @@ dead_control_flow_eliminate(backend_visitor *v)
 {
    bool progress = false;
 
-   cfg_t cfg(v);
+   cfg_t cfg(&v->instructions);
 
    for (int b = 0; b < cfg.num_blocks; b++) {
       bblock_t *block = cfg.blocks[b];

src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp

@@ -525,7 +525,7 @@ fs_visitor::opt_copy_propagate()
 {
    bool progress = false;
    void *mem_ctx = ralloc_context(this->mem_ctx);
-   cfg_t cfg(this);
+   cfg_t cfg(&instructions);
    exec_list *out_acp[cfg.num_blocks];
    for (int i = 0; i < cfg.num_blocks; i++)
       out_acp[i] = new exec_list [ACP_HASH_SIZE];

src/mesa/drivers/dri/i965/brw_fs_cse.cpp

@@ -269,7 +269,7 @@ fs_visitor::opt_cse()
 
    calculate_live_intervals();
 
-   cfg_t cfg(this);
+   cfg_t cfg(&instructions);
 
    for (int b = 0; b < cfg.num_blocks; b++) {
       bblock_t *block = cfg.blocks[b];

src/mesa/drivers/dri/i965/brw_fs_generator.cpp

@@ -1308,7 +1308,7 @@ fs_generator::generate_code(exec_list *instructions)
 
    cfg_t *cfg = NULL;
    if (unlikely(INTEL_DEBUG & DEBUG_WM))
-      cfg = new(mem_ctx) cfg_t(mem_ctx, instructions);
+      cfg = new(mem_ctx) cfg_t(instructions);
 
    foreach_list(node, instructions) {
       fs_inst *inst = (fs_inst *)node;

src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp

@@ -320,7 +320,7 @@ fs_visitor::calculate_live_intervals()
       virtual_grf_end[i] = -1;
    }
 
-   cfg_t cfg(this);
+   cfg_t cfg(&instructions);
    this->live_intervals = new(mem_ctx) fs_live_variables(this, &cfg);
 
    /* Merge the per-component live ranges to whole VGRF live ranges. */

src/mesa/drivers/dri/i965/brw_vec4.cpp

@@ -668,7 +668,7 @@ vec4_visitor::opt_set_dependency_control()
    vec4_instruction *last_mrf_write[BRW_MAX_GRF];
    uint8_t mrf_channels_written[BRW_MAX_GRF];
 
-   cfg_t cfg(this);
+   cfg_t cfg(&instructions);
 
    assert(prog_data->total_grf ||
           !"Must be called after register allocation");

src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp

@@ -246,7 +246,7 @@ vec4_visitor::calculate_live_intervals()
     * The control flow-aware analysis was done at a channel level, while at
     * this point we're distilling it down to vgrfs.
     */
-   cfg_t cfg(this);
+   cfg_t cfg(&instructions);
    vec4_live_variables livevars(this, &cfg);
 
    for (int b = 0; b < cfg.num_blocks; b++) {