diff --git a/src/asahi/compiler/agx_nir_lower_load_mask.c b/src/asahi/compiler/agx_nir_lower_load_mask.c index 6d25294f60d..ae1b2996522 100644 --- a/src/asahi/compiler/agx_nir_lower_load_mask.c +++ b/src/asahi/compiler/agx_nir_lower_load_mask.c @@ -43,7 +43,7 @@ pass(struct nir_builder *b, nir_instr *instr, UNUSED void *data) nir_intrinsic_instr *clone_intr = nir_instr_as_intrinsic(clone); /* Shrink the load to count contiguous components */ - nir_ssa_dest_init(clone, &clone_intr->dest, count, bit_size); + nir_def_init(clone, &clone_intr->dest.ssa, count, bit_size); nir_def *clone_vec = &clone_intr->dest.ssa; clone_intr->num_components = count; diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp index 6d6029a8594..90eb6a72ae7 100644 --- a/src/compiler/glsl/glsl_to_nir.cpp +++ b/src/compiler/glsl/glsl_to_nir.cpp @@ -1721,8 +1721,8 @@ nir_visitor::visit(ir_assignment *ir) * * Note that this only handles instructions we generate at this level. */ -static nir_dest * -get_instr_dest(nir_instr *instr) +static nir_def * +get_instr_def(nir_instr *instr) { nir_alu_instr *alu_instr; nir_intrinsic_instr *intrinsic_instr; @@ -1731,18 +1731,18 @@ get_instr_dest(nir_instr *instr) switch (instr->type) { case nir_instr_type_alu: alu_instr = nir_instr_as_alu(instr); - return &alu_instr->dest.dest; + return &alu_instr->dest.dest.ssa; case nir_instr_type_intrinsic: intrinsic_instr = nir_instr_as_intrinsic(instr); if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest) - return &intrinsic_instr->dest; + return &intrinsic_instr->dest.ssa; else return NULL; case nir_instr_type_tex: tex_instr = nir_instr_as_tex(instr); - return &tex_instr->dest; + return &tex_instr->dest.ssa; default: unreachable("not reached"); @@ -1755,16 +1755,15 @@ void nir_visitor::add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size) { - nir_dest *dest = get_instr_dest(instr); + nir_def *def = get_instr_def(instr); - if (dest) - nir_ssa_dest_init(instr, dest, num_components, bit_size); + if (def) + nir_def_init(instr, def, num_components, bit_size); nir_builder_instr_insert(&b, instr); - if (dest) { - this->result = &dest->ssa; - } + if (def) + this->result = def; } nir_def * diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h index 82e3a5e4058..43de41d2eec 100644 --- a/src/compiler/nir/nir_builder.h +++ b/src/compiler/nir/nir_builder.h @@ -509,8 +509,8 @@ nir_mov_alu(nir_builder *build, nir_alu_src src, unsigned num_components) } nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_mov); - nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components, - nir_src_bit_size(src.src)); + nir_def_init(&mov->instr, &mov->dest.dest.ssa, num_components, + nir_src_bit_size(src.src)); mov->exact = build->exact; mov->src[0] = src; nir_builder_instr_insert(build, &mov->instr); diff --git a/src/compiler/nir/nir_builder_opcodes_h.py b/src/compiler/nir/nir_builder_opcodes_h.py index 243178d83f6..a21d68e7aff 100644 --- a/src/compiler/nir/nir_builder_opcodes_h.py +++ b/src/compiler/nir/nir_builder_opcodes_h.py @@ -128,9 +128,9 @@ _nir_build_${name}(nir_builder *build${intrinsic_decl_list(opcode)}) % endif % if opcode.has_dest: % if opcode.dest_components == 0: - nir_ssa_dest_init(&intrin->instr, &intrin->dest, intrin->num_components, ${get_intrinsic_bitsize(opcode)}); + nir_def_init(&intrin->instr, &intrin->dest.ssa, intrin->num_components, ${get_intrinsic_bitsize(opcode)}); % else: - nir_ssa_dest_init(&intrin->instr, &intrin->dest, ${opcode.dest_components}, ${get_intrinsic_bitsize(opcode)}); + nir_def_init(&intrin->instr, &intrin->dest.ssa, ${opcode.dest_components}, ${get_intrinsic_bitsize(opcode)}); % endif % endif % for i in range(opcode.num_srcs): diff --git a/src/compiler/nir/tests/load_store_vectorizer_tests.cpp b/src/compiler/nir/tests/load_store_vectorizer_tests.cpp index a631710897e..5460585cd5d 100644 --- a/src/compiler/nir/tests/load_store_vectorizer_tests.cpp +++ b/src/compiler/nir/tests/load_store_vectorizer_tests.cpp @@ -1200,7 +1200,7 @@ TEST_F(nir_load_store_vectorize_test, shared_load_distant_64bit) { nir_variable *var = nir_variable_create(b->shader, nir_var_mem_shared, glsl_array_type(glsl_uint_type(), 4, 0), "var"); nir_deref_instr *deref = nir_build_deref_var(b, var); - nir_ssa_dest_init(&deref->instr, &deref->dest, 1, 64); + nir_def_init(&deref->instr, &deref->dest.ssa, 1, 64); create_shared_load(nir_build_deref_array_imm(b, deref, 0x100000000), 0x1); create_shared_load(nir_build_deref_array_imm(b, deref, 0x200000001), 0x2); diff --git a/src/compiler/nir/tests/opt_if_tests.cpp b/src/compiler/nir/tests/opt_if_tests.cpp index 886b24d5e6e..028915f2efc 100644 --- a/src/compiler/nir/tests/opt_if_tests.cpp +++ b/src/compiler/nir/tests/opt_if_tests.cpp @@ -113,8 +113,8 @@ TEST_F(nir_opt_if_test, opt_if_simplification_single_source_phi_after_if) nir_phi_instr_add_src(phi, then_block, nir_src_for_ssa(one)); - nir_ssa_dest_init(&phi->instr, &phi->dest, - one->num_components, one->bit_size); + nir_def_init(&phi->instr, &phi->dest.ssa, + one->num_components, one->bit_size); nir_builder_instr_insert(b, &phi->instr); @@ -135,8 +135,8 @@ TEST_F(nir_opt_if_test, opt_if_alu_of_phi_progress) nir_loop *loop = nir_push_loop(b); { - nir_ssa_dest_init(&phi->instr, &phi->dest, - x->num_components, x->bit_size); + nir_def_init(&phi->instr, &phi->dest.ssa, + x->num_components, x->bit_size); nir_phi_instr_add_src(phi, x->parent_instr->block, nir_src_for_ssa(x)); diff --git a/src/compiler/nir/tests/opt_shrink_vectors_tests.cpp b/src/compiler/nir/tests/opt_shrink_vectors_tests.cpp index caa7729e8b9..0fbbb05e221 100644 --- a/src/compiler/nir/tests/opt_shrink_vectors_tests.cpp +++ b/src/compiler/nir/tests/opt_shrink_vectors_tests.cpp @@ -280,8 +280,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_phis_loop_simple) nir_loop *loop = nir_push_loop(b); - nir_ssa_dest_init(&phi->instr, &phi->dest, - v->num_components, v->bit_size); + nir_def_init(&phi->instr, &phi->dest.ssa, v->num_components, v->bit_size); nir_phi_instr_add_src(phi, v->parent_instr->block, nir_src_for_ssa(v)); @@ -387,8 +386,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_phis_loop_swizzle) nir_loop *loop = nir_push_loop(b); - nir_ssa_dest_init(&phi->instr, &phi->dest, - v->num_components, v->bit_size); + nir_def_init(&phi->instr, &phi->dest.ssa, v->num_components, v->bit_size); nir_phi_instr_add_src(phi, v->parent_instr->block, nir_src_for_ssa(v)); @@ -495,8 +493,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_phis_loop_phi_out) nir_loop *loop = nir_push_loop(b); - nir_ssa_dest_init(&phi->instr, &phi->dest, - v->num_components, v->bit_size); + nir_def_init(&phi->instr, &phi->dest.ssa, v->num_components, v->bit_size); nir_phi_instr_add_src(phi, v->parent_instr->block, nir_src_for_ssa(v)); diff --git a/src/compiler/nir/tests/range_analysis_tests.cpp b/src/compiler/nir/tests/range_analysis_tests.cpp index e67eef10308..97063b39873 100644 --- a/src/compiler/nir/tests/range_analysis_tests.cpp +++ b/src/compiler/nir/tests/range_analysis_tests.cpp @@ -273,7 +273,7 @@ TEST_F(unsigned_upper_bound_test, loop_phi_bcsel) nir_def *cond = nir_imm_false(b); nir_phi_instr *const phi = nir_phi_instr_create(b->shader); - nir_ssa_dest_init(&phi->instr, &phi->dest, 1, 32); + nir_def_init(&phi->instr, &phi->dest.ssa, 1, 32); nir_push_loop(b); nir_def *sel = nir_bcsel(b, cond, &phi->dest.ssa, two); diff --git a/src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp b/src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp index 13393809c83..594058efafd 100644 --- a/src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp @@ -1109,7 +1109,7 @@ LowerTexToBackend::lower_txf_ms(nir_tex_instr *tex) } auto fetch_sample = nir_instr_as_tex(nir_instr_clone(b->shader, &tex->instr)); - nir_ssa_dest_init(&fetch_sample->instr, &fetch_sample->dest, 4, 32); + nir_def_init(&fetch_sample->instr, &fetch_sample->dest.ssa, 4, 32); int used_coord_mask = 0; nir_def *backend1 = prep_src(new_coord, used_coord_mask); diff --git a/src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp b/src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp index c2e775d551d..2cfc911c316 100644 --- a/src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp @@ -247,10 +247,10 @@ class LowerSplit64op : public NirLowerInstruction { auto phi = nir_instr_as_phi(instr); auto phi_lo = nir_phi_instr_create(b->shader); auto phi_hi = nir_phi_instr_create(b->shader); - nir_ssa_dest_init( - &phi_lo->instr, &phi_lo->dest, phi->dest.ssa.num_components * 2, 32); - nir_ssa_dest_init( - &phi_hi->instr, &phi_hi->dest, phi->dest.ssa.num_components * 2, 32); + nir_def_init( + &phi_lo->instr, &phi_lo->dest.ssa, phi->dest.ssa.num_components * 2, 32); + nir_def_init( + &phi_hi->instr, &phi_hi->dest.ssa, phi->dest.ssa.num_components * 2, 32); nir_foreach_phi_src(s, phi) { auto lo = nir_unpack_32_2x16_split_x(b, nir_ssa_for_src(b, s->src, 1)); diff --git a/src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp b/src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp index 71215f18fef..1ac221fd9e5 100644 --- a/src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp @@ -545,7 +545,7 @@ r600_append_tcs_TF_emission(nir_shader *shader, enum mesa_prim prim_type) auto invocation_id = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_invocation_id); - nir_ssa_dest_init(&invocation_id->instr, &invocation_id->dest, 1, 32); + nir_def_init(&invocation_id->instr, &invocation_id->dest.ssa, 1, 32); nir_builder_instr_insert(b, &invocation_id->instr); nir_push_if(b, nir_ieq_imm(b, &invocation_id->dest.ssa, 0)); @@ -559,15 +559,15 @@ r600_append_tcs_TF_emission(nir_shader *shader, enum mesa_prim prim_type) nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_local_shared_r600); tf_outer->num_components = outer_comps; tf_outer->src[0] = nir_src_for_ssa(addr_outer); - nir_ssa_dest_init( - &tf_outer->instr, &tf_outer->dest, tf_outer->num_components, 32); + nir_def_init( + &tf_outer->instr, &tf_outer->dest.ssa, tf_outer->num_components, 32); nir_builder_instr_insert(b, &tf_outer->instr); std::vector tf_out; auto tf_out_base = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_tcs_tess_factor_base_r600); - nir_ssa_dest_init(&tf_out_base->instr, &tf_out_base->dest, 1, 32); + nir_def_init(&tf_out_base->instr, &tf_out_base->dest.ssa, 1, 32); nir_builder_instr_insert(b, &tf_out_base->instr); auto out_addr0 = nir_build_alu(b, @@ -612,8 +612,8 @@ r600_append_tcs_TF_emission(nir_shader *shader, enum mesa_prim prim_type) nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_local_shared_r600); tf_inner->num_components = inner_comps; tf_inner->src[0] = nir_src_for_ssa(addr1); - nir_ssa_dest_init( - &tf_inner->instr, &tf_inner->dest, tf_inner->num_components, 32); + nir_def_init( + &tf_inner->instr, &tf_inner->dest.ssa, tf_inner->num_components, 32); nir_builder_instr_insert(b, &tf_inner->instr); tf_out.push_back(nir_vec2(b, diff --git a/src/intel/blorp/blorp_nir_builder.h b/src/intel/blorp/blorp_nir_builder.h index d9c9b5ad41d..936bc12cb8c 100644 --- a/src/intel/blorp/blorp_nir_builder.h +++ b/src/intel/blorp/blorp_nir_builder.h @@ -61,7 +61,7 @@ blorp_nir_txf_ms_mcs(nir_builder *b, nir_def *xy_pos, nir_def *layer) tex->texture_index = 0; tex->sampler_index = 0; - nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32); + nir_def_init(&tex->instr, &tex->dest.ssa, 4, 32); nir_builder_instr_insert(b, &tex->instr); return &tex->dest.ssa;